AD585AQ Analog Devices Inc, AD585AQ Datasheet - Page 5

• Manufacturer Part Number: AD585AQ
• Description: IC AMP SAMPLE HOLD 50MA 14CDIP
• Manufacturer: Analog Devices Inc
• Type: High Speedr

Specifications of AD585AQ

• Operating Temperature: -25°C ~ 85°C
• Rohs Status: RoHS non-compliant
• Amplifier Type: Sample and Hold
• Number Of Circuits: 1
• Slew Rate: 10 V/µs
• -3db Bandwidth: 2MHz
• Current - Input Bias: 2nA
• Voltage - Input Offset: 2000µV
• Current - Supply: 10mA
• Current - Output / Channel: 50mA
• Voltage - Supply, Single/dual (±): ±5 V ~ 18 V
• Mounting Type: Through Hole
• Package / Case: 14-CDIP (0.300", 7.62mm)
• No. Of Amplifiers: 1
• Bandwidth: 2MHz
• Acquisition Time: 3µs
• Input Offset Voltage: 2mV
• Settling Time: 0.5µs
• Supply Voltage Range: -10.8 / +5V To ± 18V
• No. Of Pins: 14
• Common Mode Rejection Ratio: 80
• Current, Input Bias: 2 nA
• Current, Output: 50 mA
• Current, Supply: 10 mA
• Input Resistance: 10^12 Ohms
• Open Loop Gain: 200000
• Package Type: CDIP-14
• Resistance, Input: 10^12 Ohms
• Temperature, Operating, Maximum: 85 °C
• Temperature, Operating, Minimum: -25 °C
• Temperature, Operating, Range: -25 to +85 °C
• Time, Acquisition: 3 us (Typ.)
• Voltage, Input Offset: 5 mV
• Voltage, Offset, Input: 2 mV
• Voltage, Output Swing: 20 V
• Voltage, Supply: ±15 V
• Low Droop Rate: 1.0 mV⁄ms max
• Sample⁄hold Offset Step: 3 mV max
• Aperture Jitter: 0.5 ns
• Extended Temperature Range: -558c to +1258c
• Amplifier Case Style: DIP
• Rohs Compliant: No
• Output Type: -
• Gain Bandwidth Product: -

REV. A
For the AD585 in particular it becomes:
The addition of an external hold capacitor also affects the acqui-
sition time of the AD585. The change in acquisition time with
respect to the C
HOLD MODE
In the hold mode there are two important specifications that
must be considered; feedthrough and the droop rate. Feedthrough
errors appear as an attenuated version of the input at the output
while in the hold mode. Hold-Mode feedthrough varies with fre-
quency, increasing at higher frequencies. Feedthrough is an im-
portant specification when a sample and hold follows an analog
multiplexer that switches among many different channels.
Hold-mode droop rate is the change in output voltage per unit
of time while in the hold mode. Hold-mode droop originates as
leakage from the hold capacitor, of which the major leakage
current contributors are switch leakage current and bias current.
The rate of voltage change on the capacitor dV/dT is the ratio of
the total leakage current I
For the AD585 in particular;
Additionally the leakage current doubles for every 10 C increase
in temperature above 25 C; therefore, the hold-mode droop rate
characteristic will also double in the same fashion. The hold-mode
droop rate can be traded-off with acquisition time to provide the
best combination of droop error and acquisition time. The tradeoff
is easily accomplished by varying the value of C
Since a sample and hold is used typically in combination with
an A/D converter, then the total droop in the output voltage has
to be less than 1/2 LSB during the period of a conversion. The
maximum allowable signal change on the input of an A/D
converter is:
Once the maximum V is determined then the conversion time
of the A/D converter (T
mum allowable dV/dT.
The maximum
the limit not only at 25 C but at the maximum expected operat-
ing temperature range. Therefore, over the operating temperature
range the following criteria must be met (T
= T.
Droop Rate
S/H Offset (V )
Droop Rate
EXT
dV max
V max =
dT
dV 25 C
is shown graphically in Figure 2.
dV
dT
dt
dV
CONV
L
dT
as shown by the previous equation is
OUT
max
to the hold capacitance C
Full -Scale Voltage
) is required to calculate the maxi-
100 pF
100 pF
(Volts/Sec)
2
T
2
100 pA
V max
10 C
CONV
T C
N 1
0.3 pC
(C
EXT
C
OPERATION
EXT
dV max
C
I
)
L
EXT
dT
H
( pA)
( pF )
.
H
.
–25 C)
–5–
HOLD-TO-SAMPLE TRANSITION
The Nyquist theorem states that a band-limited signal which is
sampled at a rate at least twice the maximum signal frequency
can be reconstructed without loss of information. This means
that a sampled data system must sample, convert and acquire
the next point at a rate at least twice the signal frequency. Thus
the maximum input frequency is equal to
Where T
amplifier, T
be ignored) and T
converter.
DATA ACQUISITION SYSTEMS
The fast acquisition time of the AD585 when used with a high
speed A/D converter allows accurate digitization of high fre-
quency signals and high throughput rates in multichannel data
acquisition systems. The AD585 can be used with a number of
different A/D converters to achieve high throughput rates. Fig-
ures 12 and 13 show the use of an AD585 with the AD578 and
AD574A.
Figure 12. A/D Conversion System, 117.6 kHz Throughput
58.8 kHz max Signal Input
Figure 13. 12-Bit A/D Conversion System, 26.3 kHz
Throughput Rate, 13.1 kHz max Signal Input
ACQ
AP
is the acquisition time of the sample-to-hold
f
is the maximum aperture time (small enough to
MAX
CONV
2 T
is the conversion time of the A/D
ACQ
T
CONV
1
T
AP
AD585