LMC7101AIM5/NOPB National Semiconductor, LMC7101AIM5/NOPB Datasheet - Page 19

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LMC7101AIM5/NOPB

Manufacturer Part Number
LMC7101AIM5/NOPB
Description
IC OP AMP TINY LOW PWR SOT23-5
Manufacturer
National Semiconductor
Datasheet

Specifications of LMC7101AIM5/NOPB

Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
1.1 V/µs
Gain Bandwidth Product
1.1MHz
Current - Input Bias
1pA
Voltage - Input Offset
110µV
Current - Supply
800µA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
2.7 V ~ 15.5 V, ±1.35 V ~ 7.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Number Of Channels
1
Voltage Gain Db
110.63 dB
Common Mode Rejection Ratio (min)
55 dB
Input Voltage Range (max)
15.5 V
Input Voltage Range (min)
2.7 V
Input Offset Voltage
7 mV
Operating Supply Voltage
3 V, 5 V, 15 V
Supply Current
0.5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
Other names
*LMC7101AIM5
*LMC7101AIM5/NOPB
LMC7101AIM5
Q1159899
Q700765

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4.0 CAPACITIVE LOAD TOLERANCE
The LMC7101 can typically directly drive a 100 pF load with
V
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op amps. The combina-
tion of the op amp's output impedance and the capacitive load
induces phase lag. This results in either an underdamped
pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple technique
is useful for isolating the capacitive input of multiplexers and
A/D converters.
5.0 COMPENSATING FOR INPUT CAPACITANCE WHEN
USING LARGE VALUE FEEDBACK RESISTORS
When using very large value feedback resistors, (usually
> 500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), C
S
= 15V at unity gain without oscillating. The unity gain fol-
f
is first estimated by:
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
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19
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or small-
er than that of a breadboard, so the actual optimum value for
C
the actual circuit. (Refer to the LMC660 quad CMOS amplifier
data sheet for a more detailed discussion.)
F
FIGURE 5. Cancelling the Effect of Input Capacitance
may be different. The values of C
R
1
C
IN
or
R
2
C
F
f
should be checked on
www.national.com
1199112

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