AD712KR-REEL Analog Devices Inc, AD712KR-REEL Datasheet - Page 14

IC OPAMP BIFET DUAL PREC 8SOIC

AD712KR-REEL

Manufacturer Part Number
AD712KR-REEL
Description
IC OPAMP BIFET DUAL PREC 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD712KR-REEL

Rohs Status
RoHS non-compliant
Amplifier Type
J-FET
Number Of Circuits
2
Slew Rate
20 V/µs
-3db Bandwidth
4MHz
Current - Input Bias
20pA
Voltage - Input Offset
200µV
Current - Supply
5mA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
9 V ~ 36 V, ±4.5 V ~ 20 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Output Type
-
Gain Bandwidth Product
-
AD712
APPLICATIONS INFORMATION
GUARDING
The low input bias current (15 pA) and low noise characteristics
of the AD712 BiFET op amp make it suitable for electrometer
applications such as photo diode preamplifiers and picoampere
current-to-voltage converters. The use of a guarding technique,
such as that shown in Figure 38, in printed circuit board (PCB)
layout and construction is critical to minimize leakage currents.
The guard ring is connected to a low impedance potential at the
same level as the inputs. High impedance signal lines should
not be extended for any unnecessary length on the PCB.
DAC CONVERTER APPLICATIONS
The AD712 is an excellent output amplifier for CMOS DACs. It can
be used to perform both 2-quadrant and 4-quadrant operations.
The output impedance of a DAC using an inverted R-2R ladder
approaches R for codes containing many 1s, and 3R for codes
containing a single 1. For codes containing all 0s, the output
impedance is infinite.
For example, the output resistance of the AD7545 modulates
between 11 kΩ and 33 kΩ. Therefore, with an 11 kΩ DAC
internal feedback resistance, the noise gain varies from 2 to 4/3.
This changing noise gain modulates the effect of the input offset
voltage of the amplifier, resulting in nonlinear DAC amplifier
performance.
The AD712K with guaranteed 700 μV offset voltage minimizes
this effect to achieve 12-bit performance.
Figure 38. Board Layout for Guarding Inputs
AND SOIC (R) PACKAGES.
1
3
2
PDIP (N), CERDIP (Q),
V
4
IN
*FOR VALUES OF
R1 AND R2 SEE TABLE 3
ADJUST
GAIN
R1*
5
6
7
8
DB11 TO DB0
DATA INPUT
V
REF
V
V
DD
DD
12
AD7545
DGND
R
FB
AGND
OUT1
Figure 40. Bipolar Operation
R2*
Rev. H | Page 14 of 20
C1
33pF
ANALOG
COMMON
+
AD712
+15V
1/2
Figure 39 and Figure 40 show the AD712 and AD7545 (12-bit
CMOS DAC) configured for unipolar binary (2-quadrant multi-
plication) or bipolar (4-quadrant multiplication) operation.
Capacitor C1 provides phase compensation to reduce overshoot
and ringing.
V
V
R1 and R2 calibrate the zero offset and gain error of the DAC.
Specific values for these resistors depend upon the grade of
AD7545 and are listed in Table 3.
Table 3. Recommended Trim Resistor Values vs. Grades of
the AD7545 for V
Trim
Resistor
R1
R2
IN
IN
*REFER TO
TABLE 3
*REFER TO
TABLE 3
0.1µF
ADJUST
ADJUST
GAIN
GAIN
R1A*
R1B*
10kΩ 1%
R3
JN/AQ
500 Ω
150 Ω
DB11 TO DB0
DB11 TO DB0
V
V
REF
REF
V
V
V
V
R4
20kΩ 1%
DD
DD
DD
DD
Figure 39. Unipolar Binary Operation
DD
AD7545
AD7545
+
AD712
20kΩ 1%
–15V
= 5 V
1/2
R5
DGND
DGND
R
R
0.1µF
FB
FB
AGND
AGND
OUT1
OUT1
KN/BQ
200 Ω
68 Ω
R2A*
R2B*
COMMON
COMMON
ANALOG
ANALOG
V
OUT
C1A
33pF
C1B
33pF
+
+
LN
100 Ω
33 Ω
AD712
AD712
+15V
–15V
1/2
1/2
0.1µF
0.1µF
GLN
20 Ω
6.8 Ω
V
V
OUTA
OUTB

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