MB3793-27APNF-G-JN-ER6E1 Fujitsu Semiconductor America Inc, MB3793-27APNF-G-JN-ER6E1 Datasheet - Page 4
![IC PWR VOLT MON 27A WD 8SOP](/photos/12/58/125889/mb3793-27apnf-g-jn-er6e1_sml.jpg)
MB3793-27APNF-G-JN-ER6E1
Manufacturer Part Number
MB3793-27APNF-G-JN-ER6E1
Description
IC PWR VOLT MON 27A WD 8SOP
Manufacturer
Fujitsu Semiconductor America Inc
Type
Simple Reset/Power-On Resetr
Datasheet
1.MB3793-27APNF-G-JN-ER6E1.pdf
(23 pages)
Specifications of MB3793-27APNF-G-JN-ER6E1
Number Of Voltages Monitored
1
Output
CMOS Inverted
Reset
Active Low
Reset Timeout
30 ms Minimum
Voltage - Threshold
2.7V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1023-2
MB3793
-27A
BLOCK DESCRIPTION
1. Comp. S
Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (V
) that is the result of
S
dividing the power voltage (V
) by resistors 1 and 2. When V
falls below 1.24 V, a reset signal is output.
CC
S
This function enables the MB3793 to detect an abnomality within 1 s when the power is cut or falls abruptly.
2. Output circuit
The output circuit contains a RESET output control comparator that compares the voltage at the CTP pin to the
threshold voltage to release the RESET output if the CTP pin voltage exceeds the threshold value.
Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.
3. Pulse generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 clock pins changes to High from Low
level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer.
4. Watchdog timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock pins to monitor a single
clock pulse.
5. Inhibition pin
The inhibition (INH) pin forces the watchdog timer on/off. When this pin is High level, the watchdog timer is stopped.
6. Logic circuit
The logic circuit contains flip-flops.
Flip-flop RSFF1 controls the charging and discharging of the power-on reset time setting capacitor (C
).
TP
Flip-flop RSFF2 turns on/off the circuit that accelerates charging of the power-on reset time setting capacitor
(C
) at a reset. The RSFF2 operates only at a reset; it does not operate at a power-on reset when the power is
TP
turned on.
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