ADM13305-33ARZ Analog Devices Inc, ADM13305-33ARZ Datasheet - Page 10

• Manufacturer Part Number: ADM13305-33ARZ
• Description: IC SUPERVISOR DUAL 5/3.3V 8SOIC
• Manufacturer: Analog Devices Inc
• Type: Multi-Voltage Supervisorr

Specifications of ADM13305-33ARZ

• Number Of Voltages Monitored: 2
• Output: Push-Pull, Totem Pole
• Reset: Active High/Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 2.93V, 4.55V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Threshold Voltage: 4.4V
• No. Of Supervisors / Monitors: 2
• Supply Voltage Range: 2.7V To 5.5V
• Reset Type: Active-High / Active-Low
• Supply Current: 40µA
• Delay Time: 200ms
• Number Of Elements: 2
• Monitored Voltage 1 (typ): 1.8/2.5/3.3/5V
• Battery Backup Switching: No
• Watchdog Timer: Yes
• Chip Enable Signals: No
• Reset Active Time: 280ms
• Manual Reset: Yes
• Package Type: SOIC N
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 5.5V
• Reset Threshold Voltage (max): 3.02/4.67V
• Reset Threshold Voltage (min): 2.86/4.46V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Power Fail Detection: No
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADM13305
THEORY OF OPERATION
The ADM13305 is a dual voltage supervisor designed to
monitor two supplies and provide a reset signal to DSP and
microprocessor-based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also
an adjustable input option with an undervoltage threshold of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 have
two internally fixed thresholds, while the ADM13305-4 and
ADM13305-5 offer one internally fixed threshold and one
externally programmable threshold via a resistor string. See
the Ordering Guide for a list of all available options.
INPUT CONFIGURATION
The ADM13305 is powered through V
immunity in noisy applications, place a 0.1 μF capacitor
between the V
The SENSEv inputs are resistant to short power supply glitches.
Do not allow an unused SENSEv input to float or to be grounded,
instead connect it to a supply voltage greater than its specified
threshold voltage.
Typically, the threshold voltage at each adjustable SENSEv input
is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor
divider network to the device as depicted in Figure 13, where,
RESET OUTPUT
The reset outputs are guaranteed to be in the correct state for
V
the supply voltage becomes greater than 1.1 V.
DD
down to 1.1 V. During power-up, RESET is asserted when
V
MONITERED
DD
Figure 13. Setting the Adjustable Monitor
MONITORED VOLTAGE
=
input and ground.
0
6 .
V
R1
R2
⎛
⎜
⎝
R1
R2
+
R2
⎞
⎟
⎠
V
REF
= 0.6V
DD
. To increase noise
Rev. 0 | Page 10 of 12
SENSEv
Once the supplies monitored at the SENSEv pins rise above
their associated threshold level, the RESET signal remains low
for the reset timeout period before deasserting. Subsequently, if
either of the supplies monitored by the SENSEv pins falls below
its associated threshold the RESET output reasserts.
The ADM13305 features both an active-low, push-pull RESET
output and an active-high, push-pull RESET output.
WATCHDOG TIMER
The ADM13305 features a watchdog timer that monitors
microprocessor activity. A timer circuit is cleared with every
low-to-high or high-to-low logic transition on the watchdog
input pin (WDI). If the timer counts through the preset
watchdog timeout period of 1.6 sec, RESET is asserted, as
shown in
The microprocessor is required to toggle the WDI pin to avoid
being reset. Therefore, failure of the microprocessor to toggle
WDI within the timeout period indicates a code execution error
and the reset pulse generated restarts the microprocessor in a
known state. The watchdog timer can be disabled by leaving
WDI floating.
RESET
V
(NOM)
V
IT–
RESET
1
0
WDI
Figure 15
1
0
1
0
t
d
Figure 15. Watchdog Timing Diagram
Figure 14. Reset Timing Diagram
.
t
WD
t
d
t
d
t
t
t
t