MAX805LCSA+ Maxim Integrated Products, MAX805LCSA+ Datasheet - Page 6

• Manufacturer Part Number: MAX805LCSA+
• Description: IC SUPERVISOR MPU 8-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Battery Backup Circuitr

Specifications of MAX805LCSA+

• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active High
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4.65V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Monitored Voltage: 4.65 V
• Undervoltage Threshold: 4.5 V
• Overvoltage Threshold: 4.75 V
• Output Type: Active High, Push-Pull
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: Backup
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.1 V
• Maximum Power Dissipation: 471 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Power Fail Detection: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A microprocessor’s (µP’s) reset input starts the µP in a
known state. When the µP is in an unknown state, it should
be held in reset. The MAX690A/MAX692A/MAX802L/
MAX802M assert reset during power-up and prevent code
execution errors during power-down or brownout condi-
tions.
On power-up, once V
teed to be a logic low. As V
low. When V
timer keeps RESET low for a time equal to the reset
pulse width; after this interval, RESET goes high (Figure
2). If a brownout condition occurs (if V
the reset threshold), RESET is triggered. Each time
RESET is triggered, it stays low for the reset pulse width
interval. Any time V
the internal timer restarts the pulse. If a brownout con-
dition interrupts a previously initiated reset pulse, the
reset pulse continues for another 200ms. On power-
down, once V
guaranteed to be logic low until V
RESET is also triggered by a watchdog timeout. If a
high or low is continuously applied to the WDI pin for
1.6sec, RESET pulses low. As long as RESET is assert-
Microprocessor Supervisory Circuits
Figure 1. Block Diagram
_______________Detailed Description
6
V
WDI
PFI
BATT
V
( ) ARE FOR MAX805L ONLY.
CC
_______________________________________________________________________________________
CC
CC
exceeds the reset threshold, an internal
3.5V
1.25V
0.8V
BATTERY-SWITCHOVER
goes below the threshold, RESET is
CC
CIRCUITRY
CC
goes below the reset threshold,
1.25V
reaches 1V, RESET is guaran-
GND
WATCHDOG
TIMER
CC
MAX802M
MAX690A
MAX692A
MAX802L
MAX805L
CC
rises, RESET remains
GENERATOR
droops below 1V.
RESET
Reset Output
CC
dips below
RESET
(RESET)
V
PFO
OUT
ed, the watchdog timer remains clear. When RESET
comes high, the watchdog resumes timing and must be
serviced within 1.6sec. If WDI is tied high or low, a
RESET pulse is triggered every 1.8sec (t
The MAX805L active-high RESET output is the inverse
of the MAX690A/MAX692A/MAX802L/MAX802M RESET
output, and is guaranteed to be valid with V
1.1V. Some µPs, such as Intel’s 80C51, require an
active-high reset pulse.
The watchdog circuit monitors the µP’s activity. If the
µP does not toggle the watchdog input (WDI) within
1.6sec, a reset pulse is triggered. The internal 1.6sec
timer is cleared by either a reset pulse or by open cir-
cuiting the WDI input. As long as reset is asserted or
the WDI input is open circuited, the timer remains
cleared and does not count. As soon as reset is
released or WDI is driven high or low, the timer starts
counting. It can detect pulses as short as 50ns.
The PFI input is compared to an internal 1.25V refer-
ence. If PFI is less than 1.25V, PFO goes low. The
power-fail comparator is intended for use as an under-
voltage detector to signal a failing power supply; it
need not be dedicated to this function though, as it is
Figure 2. Timing Diagram
V
(RESET)
( ) ARE FOR MAX805L ONLY.
V
RESET
PFO
CC
OUT
+5V
+5V
+5V
+5V
0V
0V
0V
0V
0V
3.0V
3.0V
Power-Fail Comparator
Watchdog Input
V
I
OUT
BATT
t
RS
WD
= 0mA
= PFI = 3.0V
plus t
CC
down to
RS
).