MAX16041TE+ Maxim Integrated Products, MAX16041TE+ Datasheet - Page 11

• Manufacturer Part Number: MAX16041TE+
• Description: IC SUPERVISOR CIRC DL 16-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Sequencerr

Specifications of MAX16041TE+

• Number Of Voltages Monitored: 2
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 140 ms/Adjustable Minimum
• Voltage - Threshold: 9 Selectable Threshold Combinations
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Undervoltage Threshold: Adjustable
• Overvoltage Threshold: Adjustable
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Supply Voltage (max): 28 V
• Supply Voltage (min): 2.2 V
• Supply Current (typ): 52 uA
• Maximum Power Dissipation: 2000 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

All of these parts offer an internally fixed reset timeout
(140ms min) by connecting CRESET to V
timeout can also be adjusted by connecting a capaci-
tor from CRESET to GND. When the voltage at CRESET
reaches 0.5V, RESET goes high. When RESET goes
high, CRESET is immediately held low.
Calculate the reset timeout period as follows:
where V
seconds, and C
accuracy and proper operation, minimize leakage at
C
When V
250nA current source begins charging an external
capacitor connected from CDLY_ to GND. When the
voltage at CDLY_ reaches 1V, OUT_ goes high. When
OUT_ goes high, CDLY_ is immediately held low.
Adjust the delay (t
V
the equation:
where V
Farads, and t
accuracy and proper operation, minimize leakage
at CDLY.
Many µP-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic-low on MR
asserts RESET low. RESET remains asserted while MR
is low and during the reset timeout period (140ms fixed
or capacitor adjustable) after MR returns high. The MR
input has a 500nA internal pullup, so it can be left
unconnected, if not used. MR can be driven with TTL or
CMOS logic levels, or with open-drain/collector outputs.
TH
CRESET
(with EN_ high) to OUT_ going high according to
IN
Adjustable, Sequencing/Supervisory Circuits
t
TH-CDLY
TH-RESET
t
DELAY
.
RP
rises above V
=
Adjustable Reset Timeout Period
DELAY
V
I
CH RESET
=
TH RESET
CRESET
is 1V, I
V
−
I
is 0.5V, I
______________________________________________________________________________________
−
CH CDLY
TH CDLY
DELAY
−
−
is in seconds. To ensure timing
Adjustable Delay (CDLY_)
Manual-Reset Input ( MR )
CH-CDLY
is in Farads. To ensure timing
TH
Dual-/Triple-/Quad-Voltage, Capacitor-
) from when V
×
CH-RESET
C
with EN_ high, the internal
×
CRESET
C
CDLY
is 0.25µA, C
+
+
is 0.5µA, t
30 10
35 10
IN
CC
×
×
(CRESET)
rises above
. The reset
CDLY
−
−
6
6
RP
is in
is in
Connect a normally open momentary switch from MR to
GND to create a manual-reset function. External
debounce circuitry is not required. If MR is driven from
long cables or if the device is used in a noisy environ-
ment, connect a 0.1µF capacitor from MR to GND to
provide additional noise immunity.
The exact value of the pullup resistors for the open-
drain outputs is not critical, but some consideration
should be made to ensure the proper logic levels
when the device is sinking current. For example, if
V
sink current less than 0.5mA as shown in the Electrical
Characteristics . As a result, the pullup resistor should
be greater than 56kΩ. For a 12V pullup, the resistor
should be larger than 24kΩ. Note that the ability to sink
current is dependent on the V
The device operates with a V
2.2V to 28V. When V
all the outputs go low and stay low until V
1.2V. For noisy systems or fast rising transients on V
connect a 0.1µF ceramic capacitor from V
as close to the device as possible to provide better
noise and transient immunity.
When V
sink current decreases. To ensure a valid output as
V
to GND.
Figures 4 and 5 show typical applications for the
MAX16041/MAX16042/MAX16043. In high-power appli-
cations, using an n-channel device reduces the loss
across the MOSFETs as it offers a lower drain-to-source
on-resistance. However, an n-channel MOSFET
requires a sufficient V
low R
MAX16042 configured in a multiple-output sequencing
application. Figure 5 shows the MAX16043 in a power-
supply sequencing application using n-channel
MOSFETs.
CC
CC
= 2.25V and the pullup voltage is 28V, keep the
falls to 0V, connect a 100kΩ resistor from RESET
DS_ON
CC
falls below 1.2V, the ability for the output to
. The application in Figure 4 shows the
Ensuring Valid Reset Output
Typical Application Circuits
CC
GS
Power-Supply Bypassing
falls below the UVLO threshold,
voltage to fully enhance it for a
Pullup Resistor Values
with V
CC
CC
supply voltage.
supply voltage from
CC
Down to 0V
CC
CC
falls below
to GND
CC
11
,