MAX791CSE+ Maxim Integrated Products, MAX791CSE+ Datasheet - Page 11

• Manufacturer Part Number: MAX791CSE+
• Description: IC MPU SUPERVISOR CIRCUIT 16SOIC
• Manufacturer: Maxim Integrated Products
• Type: Battery Backup Circuitr

Specifications of MAX791CSE+

• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4.65V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Monitored Voltage: 4.65 V
• Undervoltage Threshold: 4.5 V
• Overvoltage Threshold: 4.75 V
• Manual Reset: Resettable
• Watchdog: Yes
• Battery Backup Switching: Yes
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 0 V
• Supply Current (typ): 150 uA
• Maximum Power Dissipation: 696 mW
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 70 C
• Chip Enable Signals: Yes
• Minimum Operating Temperature: 0 C
• Output Type: Active Low or Open Drain or Push-Pull
• Power Fail Detection: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

enables the MAX791 to be used with most µPs.
CE IN is high impedance (disabled mode) while RESET
is asserted.
During a power-down sequence where V
4.65V, CE IN assumes a high-impedance state when
the voltage at CE IN goes high or 15µs after reset is
asserted, whichever occurs first (Figure 7).
During a power-up sequence, CE IN remains high
impedance, regardless of CE IN activity, until reset is
deasserted following the reset-timeout period.
In the high-impedance mode, the leakage currents into
this input are ±1µA max over temperature. In the low-
impedance mode, the impedance of CE IN appears as
a 75Ω resistor in series with the load at CE OUT.
The propagation delay through the CE transmission
gate depends on both the source impedance of the
drive to CE IN and the capacitive loading on CE OUT
(see the Chip-Enable Propagation Delay vs. CE OUT
Load Capacitance graph in the Typical Operating
Characteristics). The CE propagation delay is produc-
tion tested from the 50% point on CE IN to the 50%
point on CE OUT using a 50Ω driver and 50pF of load
capacitance (Figure 8). For minimum propagation
delay, minimize the capacitive load at CE OUT and use
Figure 7. Reset and Chip-Enable Timing
THRESHOLD
CE OUT
RESET
RESET
RESET
CE IN
V
CC
______________________________________________________________________________________
Microprocessor Supervisory Circuit
15µs
100µs
Chip-Enable Input
CC
100µs
passes
a low output-impedance driver.
In the enabled mode, the impedance of CE OUT is
equivalent to 75Ω in series with the source driving CE
IN. In the disabled mode, the 75Ω transmission gate is
off and CE OUT is actively pulled to V
turns off when the transmission gate is enabled.
The low-line comparator monitors V
threshold voltage 150mV above the reset threshold,
and has 15mV of hysteresis. LOWLINE typically sinks
3.2mA at 0.1V. For normal operation (V
LOWLINE threshold), LOWLINE is pulled to V
access to the unregulated supply is unavailable, use
LOWLINE to provide a nonmaskable interrupt (NMI) to
the µP as V
The power-fail comparator is an uncommitted compara-
tor that has no effect on the other functions of the IC.
Common uses include monitoring supplies other than
5V (see the Typical Operating Circuit and the
Monitoring a Negative Voltage section) and early
power-fail detection when the unregulated power is
easily accessible (Figure 9b).
Figure 8. CE Propagation Delay Test Circuit
50Ω DRIVER
CC
begins to fall (Figure 9a).
CE IN
MAX791
Power-Fail Comparator
GND
V
+5V
CC
CE OUT
LOWLINE Output
Chip-Enable Output
CC
OUT
CC
with a typical
. This source
C
LOAD
above the
OUT
. If
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