LTC2902-1IGN#PBF Linear Technology, LTC2902-1IGN#PBF Datasheet - Page 10

IC MON SUPP QD W/RST&SEL 16-SSOP

LTC2902-1IGN#PBF

Manufacturer Part Number
LTC2902-1IGN#PBF
Description
IC MON SUPP QD W/RST&SEL 16-SSOP
Manufacturer
Linear Technology
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of LTC2902-1IGN#PBF

Number Of Voltages Monitored
4
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
5 ms Minimum
Voltage - Threshold
16 Selectable Threshold Combinations
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIO S I FOR ATIO
LTC2902
Power-Up
On power-up, the larger of V1 or V2 will power the drive
circuits for the RST and the COMPX pins. This ensures
that the RST and COMPX outputs will be low as soon as
V1 or V2 reaches 1V. The RST and COMPX outputs will
remain low until the part is programmed. After program-
ming, if any one of the V
threshold, RST will be a logic low. Once all the V
rise above their thresholds, an internal timer is started
and RST is released after the programmed delay time. If
V
will be low (1k typ).
Monitor Programming
The LTC2902 input voltage combination is selected by
placing the recommended resistor divider from V
GND and connecting the tap point to V
Figure 4. Table 1 offers recommended 1% resistor values
for the various modes. The last column in Table 1 speci-
fies optimum V
programming with a ratiometric DAC.
During power-up, once V1 or V2 reaches 2.4V (max), the
monitor enters a programming period of approximately
150 s during which the voltage on the V
and the monitor is configured to the desired input combi-
nation. Do not add capacitance to the V
after programming, the comparators are enabled and
supply monitoring will begin.
Supply Monitoring
The LTC2902 is a low power, high accuracy program-
mable quad supply monitoring circuit with four nondelayed
monitor outputs, a common reset output and selectable
supply thresholds. Reset timing is adjustable using an
external capacitor. Single pin programming selects 1 of 16
input voltage monitor combinations. Two digital inputs
select one of four supply tolerances (5%, 7.5%, 10% or
12.5%). All four voltage inputs must be above predeter-
mined thresholds for the reset not to be invoked. The
LTC2902 will assert the reset and comparator outputs
during power-up, power-down and brownout conditions
on any one of the voltage inputs.
10
CC
< (V3 – 1) and V
PG
/V
U
REF
CC
X
< 2.4V, the V3 input impedance
ratios ( 0.01) to be used when
inputs is below its programmed
U
W
PG
PG
pin. Immediately
PG
pin is sampled
, as shown in
U
X
inputs
REF
to
Table 1. Voltage Threshold Programming
The inverting inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are selected
and with T0 and T1 low (5% tolerance) (Figure 5). The tap
point on an external resistive divider, connected between
the positive voltage being sensed and ground, is connected
to the high impedance noninverting inputs (V3, V4). The
trip voltage is calculated from:
Once the resistor divider is set in the 5% tolerance mode,
there is no need to change the divider for the other
tolerance modes (7.5%, 10%, 12.5%) because the inter-
nal reference is scaled accordingly, moving the trip point
in – 2.5% increments.
MODE
10
11
12
13
14
15
V
0
1
2
3
4
5
6
7
8
9
TRIP
V1 (V) V2 (V) V3 (V) V4 (V) R1 (k ) R2 (k )
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
0 5 1
.
Figure 4. Monitor Programming
V
3.3
3.3
2.5
2.5
2.5
3.3
3.3
3.3
3.0
3.0
2.5
2.5
2.5
3.3
3.3
3.0
LTC2902
R
R
V
GND
V
REF
ADJ
ADJ
ADJ
ADJ
ADJ
PG
3
4
1.5
2.5
2.5
2.5
2.5
1.8
1.8
1.8
1.8
1.8
1.8
12
11
10
–ADJ
–ADJ
–ADJ
–ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
ADJ
1.8
1.5
1.5
1%
R1
Open
Short
93.1
86.6
78.7
71.5
66.5
59.0
53.6
47.5
40.2
34.8
28.0
22.1
16.2
9.53
R2
1%
2902 F04
Short
Open
9.53
22.1
28.0
34.8
40.2
47.5
53.6
66.5
71.5
78.7
86.6
93.1
16.2
59.0
0.000
0.094
0.156
0.219
0.281
0.344
0.406
0.469
0.531
0.594
0.656
0.719
0.781
0.844
0.906
1.000
V
V
REF
PG
2902f

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