NCP303LSN44T1G ON Semiconductor, NCP303LSN44T1G Datasheet - Page 20

• Manufacturer Part Number: NCP303LSN44T1G
• Description: IC DETECTOR VOLTAGE 4.4V SOT23-5
• Manufacturer: ON Semiconductor
• Type: Simple Reset/Power-On Resetr

Specifications of NCP303LSN44T1G

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 4.4V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: TSOT-23-5, TSOT-5, TSOP-5
• Voltage Supervisor Type: Voltage Detector
• Number Of Voltage Supervisors: 1
• Monitored Supervisor Voltage: 4.4
• Reset Threshold Voltage (min): 4.312V
• Reset Threshold Voltage (max): 4.488V
• Operating Supply Voltage (min): 0.8V
• Operating Supply Voltage (max): 10V
• Package Type: TSOP
• Operating Temperature Classification: Automotive
• Operating Temp Range: -40C to 125C
• Pin Count: 5
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP303LSN44T1GOS; NCP303LSN44T1GOS; NCP303LSN44T1GOSTR

input falls below the detector threshold (V
capacitor on the C
resulting in the reset output changing to its active state
indicating that an undervoltage event has been detected. The
addition of a logic gate (Logic 1) provides for reset output
control which is independent of V
This circuit monitors V
NCP302
Input Pin
Logic 1
Enable
Pin
C
Reset
Output
Note: Logic 1 is in tristate when EN = 0,
D
EN
Pin
V
TCD
 0.675 * V
Logic 1
IN
D
pin will be immediately discharged
Figure 45. Undervoltage Detection with Independent Reset Signal Control
V
V
V
V
TCD
DET
0 V
0 V
0 V
DD
DD
DD
1
0
DD
for undervoltage. If the V
C
DD
D
. If the output of the
V
DD
DET−
C
5
D
), then the
t
D2
http://onsemi.com
DD
NCP302L
Series
2
3
20
GND
Input
logic gate is tristated the undervoltage detector will behave
normally. If the tristate is de−asserted, the logic gate will pull
the C
an active state. This independent control is useful in power
supply sequencing applications when the Reset Output is
tied to the enable input of an LDO or DC−DC converter.
D
pin low resulting in the Reset Output pin changing to
Reset Output
1
t
D2
To MCU or
Logic Circuitry