MAX16060ATE+T Maxim Integrated Products, MAX16060ATE+T Datasheet - Page 8
![IC UP SUPERVISOR QUAD 16-TQFN](/photos/6/66/66625/16-tqfn_exp_pad_21-0136_sml.jpg)
MAX16060ATE+T
Manufacturer Part Number
MAX16060ATE+T
Description
IC UP SUPERVISOR QUAD 16-TQFN
Manufacturer
Maxim Integrated Products
Type
Multi-Voltage Supervisorr
Datasheet
1.MAX16062ETG.pdf
(18 pages)
Specifications of MAX16060ATE+T
Number Of Voltages Monitored
4
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
140 ms/Adjustable Minimum
Voltage - Threshold
1.8V, 2.5V, 3.3V, Adj
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1% Accurate, Quad-/Hex-/Octal-Voltage
µP Supervisors
8
PIN
10
11
12
13
14
15
16
17
18
19
20
—
1
2
3
4
5
6
7
8
9
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
MARGIN
RESET
NAME
OUT4
OUT5
OUT6
OUT3
OUT2
OUT1
GND
WDI
V
SRT
TOL
IN4
IN5
IN6
IN1
IN2
IN3
MR
EP
CC
Monitored Input Voltage 4. See Table 1 for the input voltage threshold.
Monitored Input Voltage 5. See Table 1 for the input voltage threshold.
Monitored Input Voltage 6. See Table 1 for the input voltage threshold.
Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period, RESET is
asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a rising or falling
edge on WDI is detected. The watchdog timer enters a startup period that allows 54s for the first transition to
occur before a reset. Leave WDI unconnected to disable the watchdog timer.
The WDI unconnected-state detector uses a small 400nA current. Therefore, do not connect WDI to anything
that will source or sink more than 200nA. Note that the leakage current specification for most three-state
drivers exceeds 200nA.
Ground
Unmonitored Power-Supply Input
Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the voltage at
IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the voltage at
IN5 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the voltage at
IN6 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout
period after MR is deasserted. MR is pulled up to V
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset
timeout period can be calculated as follows:
Reset Timeout (s) = 2.06 x 10
V
Manual Deassert Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the voltage
at any monitored input.
Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the voltage at
IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the voltage at
IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the voltage at
IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its respective
threshold or MR is asserted. RESET remains asserted for the reset timeout period after all monitored voltages
exceed their respective thresholds and MR is deasserted. This open-drain output has a 30µA internal pullup.
Monitored Input Voltage 1. See Table 1 for the input voltage threshold.
Monitored Input Voltage 2. See Table 1 for the input voltage threshold.
Monitored Input Voltage 3. See Table 1 for the input voltage threshold.
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to V
select 10% threshold tolerance.
Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal
resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND.
CC
.
6
(Ω) x C
SRT
(F). For the internal timeout period of 140ms (min), connect SRT to
FUNCTION
CC
through a 20kΩ resistor.
Pin Description (MAX16061)
CC
CC
CC
CC
CC
CC
.
.
.
.
.
.
CC
to