U5021M-NFPY Atmel, U5021M-NFPY Datasheet - Page 4

• Manufacturer Part Number: U5021M-NFPY
• Description: IC TIMER WATCHDOG DIGITAL 8-SOIC
• Manufacturer: Atmel
• Type: Watchdog Circuitr

Specifications of U5021M-NFPY

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active High
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 4.2V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Output Type: Open Drain, Push-Pull
• Mounting Style: SMD/SMT
• Monitored Voltage: 4.5 V to 5.5 V
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Supply Current (typ): 60 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 4-1.
Figure 4-2.
4.3
4.4
4
Supply Voltage Monitoring, Pin 5
Switch-over Mode Time, Pin 3
t (µs)
U5021M
Mode
Reset Out
VDD
1000.00
Period t versus R
Power-on Reset and Switch-over Mode
100.00
10.00
1.00
1
During ramp-up of the supply voltage and in the case of supply-voltage drops the integrated
power-on reset (POR) circuitry sets the internal logic to a defined basic status and generates a
reset pulse at the reset output, pin 5. A hysteresis in the POR threshold prevents the circuit from
oscillating. During ramp-up of the supply voltage, the reset output stays active for a specified
period of time (t
4-2). Pin 5 has an open-drain output.
The switch-over mode time enables the synchronous operation of microcontroller and watchdog.
When the power-on reset time has elapsed, the watchdog has to be switched to monitoring
mode by the microcontroller by a “low” signal transmitted to the mode pin (pin 3) within the
time-out period, t
erates a reset pulse, t
the switch-over mode time, t
1
, at C
t
0
1
= 500 pF
0
1
) in order to bring the microcontroller into its defined reset status (see
. If the low signal does not occur within t
10
6
, and t
1
1
, each time a reset pulse is generated.
starts again. Microcontroller and watchdog are synchronized with
R
1
(k )
t
1
C
1
100
= 500 pF
1
(see
t
Figure
6
5.5 V
4.5 V
5.0 V
4-2), the watchdog gen-
1000
Pin 6
Pin 3
Pin 5
4756D–AUTO–11/05
Figure