MCP1726-3302E/MF Microchip Technology, MCP1726-3302E/MF Datasheet - Page 20
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MCP1726-3302E/MF
Manufacturer Part Number
MCP1726-3302E/MF
Description
IC LDO REG 1A 3.3V 8DFN
Manufacturer
Microchip Technology
Specifications of MCP1726-3302E/MF
Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 6V
Voltage - Dropout (typical)
0.22V @ 1A
Number Of Regulators
1
Current - Output
1A (Min)
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-DFN
Primary Input Voltage
6V
Output Voltage Fixed
3.3V
Dropout Voltage Vdo
220mV
No. Of Pins
8
Output Current
1A
Operating Temperature Range
-40°C To +125°C
Peak Reflow Compatible (260 C)
Yes
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
6 V
Output Voltage
3.3 V
Output Type
Fixed
Dropout Voltage (max)
220 mV
Line Regulation
0.05 % / V
Load Regulation
0.5 %
Voltage Regulation Accuracy
2.5 %
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
MCP1726
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
As you can see from the result, this application will be
operating very near the maximum operating junction
temperature of 125°C. The PCB layout for this
application is very important as it has a significant
impact on the junction-to-ambient thermal resistance
(Rθ
in this application.
Maximum Package Power Dissipation at
70°C Ambient Temperature
From this table you can see the difference in maximum
allowable power dissipation between the 3x3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS21936C-page 20
3x3 DFN (41° C/W Rθ
8LD SOIC (150°C/Watt Rθ
JA
P
P
P
P
) of the 3x3 DFN package, which is very important
D(MAX)
D(MAX)
D(MAX)
D(MAX)
T
T
T
= (125°C – 70°C) / 41° C/W
= 1.34W
= (125°C – 70°C)/ 150° C/W
= 0.366W
J
J
J
=
=
=
JA
)
T
48.8°C + 70.0°C
118.8°C
JRISE
JA
)
+ T
A(MAX)
© 2007 Microchip Technology Inc.