LT1761ES5-3#TRMPBF Linear Technology, LT1761ES5-3#TRMPBF Datasheet - Page 14
![IC LDO REG 100MA 3V TSOT23-5](/photos/6/57/65785/tsot-23-5_05-08-1635_sml.jpg)
LT1761ES5-3#TRMPBF
Manufacturer Part Number
LT1761ES5-3#TRMPBF
Description
IC LDO REG 100MA 3V TSOT23-5
Manufacturer
Linear Technology
Specifications of LT1761ES5-3#TRMPBF
Regulator Topology
Positive Fixed
Voltage - Output
3V
Voltage - Input
Up to 20V
Voltage - Dropout (typical)
0.3V @ 100mA
Number Of Regulators
1
Current - Output
100mA
Current - Limit (min)
110mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-5, TSOT-5, TSOP-5
Primary Input Voltage
4V
Output Voltage Fixed
3V
Dropout Voltage Vdo
300mV
No. Of Pins
5
Output Current
100mA
Voltage Regulator Case Style
SOT-23
Operating Temperature Range
-40°C To +125°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LT1761ES5-3#PBF
LT1761ES5-3#PBF
LT1761ES5-3#TRMPBF
LT1761ES5-3#TRMPBFTR
LT1761ES5-3#PBF
LT1761ES5-3#TRMPBF
LT1761ES5-3#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIN FUNCTIONS
LT1761 Series
IN (Pin 1): Input. Power is supplied to the device through
the IN pin. A bypass capacitor is required on this pin if
the device is more than six inches away from the main
input fi lter capacitor. In general, the output impedance
of a battery rises with frequency, so it is advisable to
include a bypass capacitor in battery-powered circuits. A
bypass capacitor in the range of 1μF to 10μF is suffi cient.
The LT1761 regulators are designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reverse input, which can happen if
a battery is plugged in backwards, the device will act as
if there is a diode in series with its input. There will be
no reverse current fl ow into the regulator and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
GND (Pin 2): Ground.
SHDN (Pin 3, Fixed/-SD Devices): Shutdown. The SHDN
pin is used to put the LT1761 regulators into a low power
shutdown state. The output will be off when the SHDN pin
is pulled low. The SHDN pin can be driven either by 5V logic
or open-collector logic with a pull-up resistor. The pull-up
resistor is required to supply the pull-up current of the
open-collector gate, normally several microamperes, and
the SHDN pin current, typically 1μA. If unused, the SHDN
pin must be connected to V
if the SHDN pin is not connected. For the LT1761-BYP , the
SHDN pin is internally connected to V
14
IN
. The device will not function
IN
.
BYP (Pins 3/4, Fixed/-BYP Devices): Bypass. The BYP
pin is used to bypass the reference of the LT1761 regula-
tors to achieve low noise performance from the regulator.
The BYP pin is clamped internally to ±0.6V (one V
ground. A small capacitor from the output to this pin will
bypass the reference to lower the output voltage noise.
A maximum value of 0.01μF can be used for reducing
output voltage noise to a typical 20μV
to 100kHz bandwidth. If not used, this pin must be left
unconnected.
ADJ (Pin 4, Adjustable Devices Only): Adjust Pin. For the
adjustable LT1761, this is the input to the error amplifi er.
This pin is internally clamped to ±7V. It has a bias current
of 30nA which fl ows into the pin (see curve of ADJ Pin
Bias Current vs Temperature in the Typical Performance
Characteristics section). The ADJ pin voltage is 1.22V
referenced to ground and the output voltage range is
1.22V to 20V.
OUT (Pin 5): Output. The output supplies power to the load.
A minimum output capacitor of 1μF is required to prevent
oscillations. Larger output capacitors will be required for
applications with large transient loads to limit peak volt-
age transients. See the Applications Information section
for more information on output capacitance and reverse
output characteristics.
RMS
over a 10Hz
BE
) from
1761sff