TC2015-1.8VCTTR Microchip Technology, TC2015-1.8VCTTR Datasheet - Page 9
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TC2015-1.8VCTTR
Manufacturer Part Number
TC2015-1.8VCTTR
Description
IC CMOS LDO 1.8V 100MA SOT23A-5
Manufacturer
Microchip Technology
Specifications of TC2015-1.8VCTTR
Regulator Topology
Positive Fixed
Voltage - Output
1.8V
Voltage - Input
2.7 ~ 6 V
Voltage - Dropout (typical)
0.09V @ 100mA
Number Of Regulators
1
Current - Output
100mA (Min)
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
6 V
Output Voltage
1.8 V
Output Type
Fixed
Dropout Voltage (max)
140 / 210 mV
Output Current
100 mA
Line Regulation
0.05 %
Load Regulation
0.33 %
Voltage Regulation Accuracy
0.4 %
Maximum Power Dissipation
0.318 W
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
TC20151.8VCTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TC2015-1.8VCTTR
Manufacturer:
MICROCHIP
Quantity:
20 600
Part Number:
TC2015-1.8VCTTR
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
3.0
The descriptions of the pins are described in Table 3-1.
TABLE 3-1:
3.1
Connect the unregulated input supply to the V
there is a large distance between the input supply and
the LDO regulator, some input capacitance is neces-
sary for proper operation. A 1 µF capacitor, connected
from V
applications.
3.2
Connect the unregulated input supply ground return to
GND. Also connect one side of the 1 µF typical input
decoupling capacitor close to this pin and one side of
the output capacitor C
© 2006 Microchip Technology Inc.
1
2
3
4
5
Pin No.
IN
PIN DESCRIPTIONS
Unregulated Supply Input (V
Ground Terminal (GND)
to ground, is recommended for most
Symbol
Bypass
SHDN
V
GND
V
OUT
IN
PIN FUNCTION TABLE
OUT
Unregulated supply input
Ground terminal
Shutdown control input
Reference bypass input
Regulated voltage output
to this pin.
Description
IN
IN
)
pin. If
3.3
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to this input. During shutdown, the
output voltage falls to zero and the supply current is
reduced to 0.5 µA (max).
3.4
Connecting a low-value ceramic capacitor to Bypass
will further reduce output voltage noise and improve the
Power Supply Ripple Rejection (PSRR) performance
of the LDO. Typical values from 470 pF to 0.01 µF are
suggested. While smaller and larger values can be
used, these affect the speed at which the LDO output
voltage rises when input power is applied. The larger
the bypass capacitor, the slower the output voltage will
rise.
3.5
Connect the output load to V
nect one side of the LDO output de-coupling capacitor
as close as possible to the V
TC2014/2015/2185
Shutdown Control Input (SHDN)
Reference Bypass Input (Bypass)
Regulated Voltage Output (V
OUT
OUT
of the LDO. Also con-
pin.
DS21662E-page 9
OUT
)