LT4356HDE-3#TRPBF Linear Technology, LT4356HDE-3#TRPBF Datasheet - Page 10
![IC REG OVP FAULT TIMER 12DFN](/photos/1/36/13606/12-dfn_05-08-1695_rev_d_sml.jpg)
LT4356HDE-3#TRPBF
Manufacturer Part Number
LT4356HDE-3#TRPBF
Description
IC REG OVP FAULT TIMER 12DFN
Manufacturer
Linear Technology
Datasheet
1.LT4356HDE-3PBF.pdf
(24 pages)
Specifications of LT4356HDE-3#TRPBF
Voltage - Working
4 ~ 80V
Voltage - Clamping
27V Adj
Technology
Mixed Technology
Number Of Circuits
1
Applications
Automotive
Package / Case
12-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
APPLICATIONS INFORMATION
LT4356-3
The LT4356-3 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifi er, reverse input, and the shutdown
functions are covered after the MOSFET selection. External
component selection is discussed in detail in the Design
Example section.
Overvoltage Fault
The LT4356-3 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifi er regu-
lates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor con-
nected from the TMR pin to ground, an overvoltage fault
is detected. The GATE pin is pulled down to the OUT pin
by a 150mA current. This prevents the power MOSFET
from being damaged during a long period of overvoltage,
such as during load dump in automobiles. Pulling the
SHDN pin low for at least 100μs and pulled high with a
slew rate faster than 10V/ms will allow the GATE pin to
pull back up.
10
Overcurrent Fault
The LT4356-3 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the V
pins to 50mV.
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. The GATE pin stays low until the SHDN pin is
pulled low for at least 100μs and pulled high with a slew
rate faster than 10V/ms.
Fault Timer
The LT4356-3 includes an adjustable fault timer pin. Con-
necting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cool down period before the
MOSFET is allowed to turn back on after the fault condition
has disappeared.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin. The
current level varies depending on the voltage drop across
the drain and source terminals of the power MOSFET(V
which is typically from the V
scheme takes better advantage of the available Safe Oper-
ating Area (SOA) of the MOSFET than would a fi xed timer
current. The timer function operates down to V
across the whole temperature range.
CC
pin to the OUT pin. This
CC
and SNS
CC
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= 5V
DS
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