LT4356IS-3#PBF Linear Technology, LT4356IS-3#PBF Datasheet - Page 12

• Manufacturer Part Number: LT4356IS-3#PBF
• Description: IC SURGE STOPPER W/LATCH 16SOIC
• Manufacturer: Linear Technology

Specifications of LT4356IS-3#PBF

• Voltage - Working: 4 ~ 80V
• Voltage - Clamping: 27V Adj
• Technology: Mixed Technology
• Number Of Circuits: 1
• Applications: Automotive
• Package / Case: 16-SOIC (3.9mm Width)
• Package Type: SOIC N
• Operating Supply Voltage (min): 4V
• Operating Supply Voltage (max): 80V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Mounting: Surface Mount
• Pin Count: 16
• Output Voltage: 12V
• Internal Switch: No
• Supply Voltage Range: 4V To 80V
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Compliant

APPLICATIONS INFORMATION
LT4356-3
This fi xed early warning period allows time for the system
to perform necessary backup or house-keeping functions
before power is cut off. When V
threshold, the GATE pin pulls low immediately and turns
off the MOSFET. Note that during an overcurrent event the
timer current is not reduced to 5μA when V
1.25V, since it would lengthen the overall fault timer period
and cause additional MOSFET stress. After the GATE pin
pulls low due to a fault time out, the LT4356-3 latches off.
Allow suffi cient time for the TMR pin to discharge to 0.5V
(typical discharge current is 2.2μA) and for the MOSFET
to cool before attempting to reset the part. To reset, pull
the SHDN pin low for at least 100μs, then pull high with
a slew rate of at least 10V/ms.
MOSFET Selection
The LT4356-3 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance R
V
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 16V for those applications with V
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with V
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
12
(BR)DSS
, the threshold voltage, and the SOA.
DS(ON)
, the maximum drain-source voltage
V
TMR
IN
crosses the 1.35V
Figure 3. Prototypical Transient Waveform
TMR
t
r
V
PK
reaches
CC
less
CC
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regu-
late either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356-3 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifi cations use the model shown
in Figure 3. The idealized waveform comprises a linear
ramp of rise time t
exponentially decaying back to V
of t. A common automotive transient specifi cation has
constants of t
condition known as “load dump” has constants of t
V
PK
= 60V and τ = 200ms.
r
= 10μs, V
r
, reaching a peak voltage of V
43563 F03
PK
= 80V and τ = 1ms. A surge
IN
with a time constant
r
= 5ms,
PK
43563fa
and