LP3964EMP-5.0/NOPB National Semiconductor, LP3964EMP-5.0/NOPB Datasheet - Page 8
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LP3964EMP-5.0/NOPB
Manufacturer Part Number
LP3964EMP-5.0/NOPB
Description
IC REGULATOR ULTR LDO SOT223-5
Manufacturer
National Semiconductor
Datasheet
1.LP3961EMP-1.8NOPB.pdf
(22 pages)
Specifications of LP3964EMP-5.0/NOPB
Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
Up to 7V
Voltage - Dropout (typical)
0.24V @ 800mA
Number Of Regulators
1
Current - Output
800mA
Current - Limit (min)
1.2A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-223 (4 leads + Tab)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LP3964EMP-5.0
LP3964EMP-5.0TR
LP3964EMP-5.0TR
www.national.com
Electrical Characteristics
LP3961/LP3964
ERROR FLAG COMPARATOR
AC PARAMETERS
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Charateristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at θ
(with 0.5in
0.5in
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.
Note 5: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP396X output must be diode-clamped to ground.
Note 7: The output PMOS structure contains a diode between the V
if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp
of peak current.
Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load
regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only
the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.
Note 9: Error Flag threshold and hysteresis are specified as percentage of regulated output voltage.
Note 10: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage
specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,
since the minimum input voltage is 2.5V.
Note 11: This specification has been tested for −40˚C ≤ T
Note 12: The minimum operating value for V
Limits in standard typeface are for T
Unless otherwise specified: V
Symbol
V
PSRR
T
T
EF(Sat)
I
ρ
V
2
dOFF
I
max
V
Td
dON
e
SD
I
, 1oz. copper area), junction-to-ambient. The devices in SOT223 package must be derated at θ
n(l/f
TH
lk
T
n
2
, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at θ
Turn-off delay
Turn-on delay
SD Input Current
Threshold
Threshold Hysteresis
Error Flag Saturation
Flag Reset Delay
Error Flag Pin Leakage
Current
Error Flag Pin Sink
Current
Ripple Rejection
Output Noise Density
Output Noise Voltage
(rms)
Parameter
(Continued)
IN
= V
IN
O(NOM)
J
is equal to either [V
= 25˚C, and limits in boldface type apply over the full operating temperature range.
+ 1V, I
J
I
I
V
(Note 9)
(Note 9)
I
V
V
C
V
V
C
V
f = 120Hz
BW = 10Hz – 100kHz
BW = 300Hz – 300kHz
L
L
sink
≤ 85˚C since the temperature rise of the device is negligible under shutdown conditions.
SD
Error
IN
OUT
IN
OUT
OUT
OUT
= 800 mA
= 800 mA
= V
= V
L
= 100µA
= V
= 3.3V
= 3.3V
= 10 mA, C
= 0.5V (over temp.)
= 100uF
= 100uF
IN
OUT(NOM)
Conditions
OUT
OUT
IN
and V
+ 1.5V
+ 0.3V
OUT
+ V
8
terminals. This diode is normally reverse biased. This diode will get forward biased
DROPOUT
OUT
= 33µF, V
] or 2.5V, whichever is greater.
jA
(Note 4)
SD
= 90˚C/W (with 0.5in
0.02
Typ
150
100
0.8
20
25
10
60
40
1
5
1
1
1
= V
IN
-0.3V.
LP3961/4 (Note 5)
Min
5
2
2
, 1oz. copper area), junction-to-ambient.
Max
0.1
16
8
jA
= 60˚C/W (with
jA
µV (rms)
= 50˚C/W
Units
mA
nA
nA
dB
µV
µs
µs
µs
%
%
V