CS8122YTVA5 ON Semiconductor, CS8122YTVA5 Datasheet - Page 6

• Manufacturer Part Number: CS8122YTVA5
• Description: IC REG LDO LIN 750MA 5V TO220-5
• Manufacturer: ON Semiconductor

Specifications of CS8122YTVA5

• Regulator Topology: Positive Fixed
• Voltage - Output: 5V
• Voltage - Input: 6 ~ 26 V
• Voltage - Dropout (typical): 0.35V @ 500mA
• Number Of Regulators: 1
• Current - Output: 500mA
• Current - Limit (min): 750mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: TO-220-5 (Bent and Staggered Leads)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: CS8122YTVA5OS

reset and delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1.0 V.
ON and OFF parameters as specified. The RESET output
NPN transistor is controlled by the two circuits described
(see Block Diagram on page 2).
Low Voltage Inhibit Circuit
and when output voltage is below the specified minimum,
causes the RESET output transistor to be in the ON
(saturation) state. When the output voltage is above the
specified level, this circuit permits the RESET output
transistor to go into the OFF state if allowed by the RESET
Delay circuit.
Reset Delay Circuit
external capacitor) delay on the RESET output lead. The
Delay lead provides source current to the external delay
capacitor only when the Low Voltage Inhibit circuit
indicates that output voltage is above V
the Delay lead sinks current to ground (used to discharge the
The CS8122 RESET function, has hysteresis on both the
The RESET circuit output is an open collector type with
The Low Voltage Inhibit Circuit monitors output voltage,
The Reset Delay Circuit provides a programmable (by
(3)
RESET
DELAY
V
OUT
V
V
V
RT(OFF)
V
DC(LO)
RT(ON)
DC(HI)
V
V
RL
V
RH
DH
RT(ON)
Figure 12. RESET Circuit Waveform
. Otherwise,
CIRCUIT DESCRIPTION
t
DELAY
http://onsemi.com
(1)
CS8122
6
(2)
100 nF
delay capacitor). The discharge current is latched ON when
the output voltage is below V
is fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures that a controlled RESET pulse is generated
following detection of an error condition. The circuit allows
the RESET output transistor to go to the OFF (open) state
only when the voltage on the Delay lead is higher than
V
*C
**C
DC(HI)
C
0.1 mF
(2)
C
IN
Delay
OUT
IN
is required if regulator is far from the power source filter
*
is required for stability.
.
V
Delay
IN
Figure 13. Test Circuit
CS8122
GND
RESET
V
OUT
RT(OFF)
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0 V)
4.7 kW
. The Delay capacitor
R
RST
.
V
C
10 mF
DIS
OUT
**