NCV8184D ON Semiconductor, NCV8184D Datasheet
NCV8184D
Specifications of NCV8184D
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NCV8184D Summary of contents
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NCV8184 Micropower 70 mA Low Dropout Tracking Regulator/Line Driver The NCV8184 is a monolithic integrated low dropout tracking voltage regulator designed to provide an adjustable buffered output voltage that closely tracks (±3.0 mV) the reference input. The part can be ...
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MAXIMUM RATINGS Storage Temperature Supply Voltage Range (Continuous) Supply Voltage Operating Range Peak Transient Voltage ( Load Dump Transient = Voltage Range (V , Adj) OUT Voltage Range (V /ENABLE) REF Maximum Junction Temperature ...
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TYPICAL PERFORMANCE CHARACTERISTICS 0 OUT 0.3 0.2 0.1 0.0 −0.1 −0.2 −0.3 −40 − TEMPERATURE (°C) Figure 2. Tracking Error vs. Temperature Unstable Region ...
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TYPICAL PERFORMANCE CHARACTERISTICS 0.5 +125°C 0.4 +25°C 0.3 0.2 −40°C 0.1 0 OUTPUT CURRENT (mA) Figure 8. Dropout Voltage vs. Output Current ...
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ENABLE Function By pulling the V /ENABLE lead below 0.8 V, (see REF Figure 16 or Figure 17), the IC is disabled and enters a sleep state where the device draws less than 20 mA from supply. When the V ...
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V Short to Battery OUT The NCV8184 will survive a short to battery when hooked up the conventional way as shown in Figure 19. No damage to the part will occur. The part also endures a short to battery when ...
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External Capacitors The output capacitor for the NCV8184 is required for stability. Without it, the regulator output will oscillate. Actual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also ...
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Parameter SOIC−8 Package Junction−to−Pin 6 (Y−JL6 JL6 Junction−to−Ambient ( qJA JA Package construction Without mold compound Figure 24. PCB Layout and Package Construction for Simulation PACKAGE THERMAL DATA Conditions Typical Value 2 100 mm Spreader ...
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Table 1. SOIC−8 THERMAL RC NETWORK MODELS* Copper Area (1 oz thick) C_C1 Junction Gnd C_C2 node1 Gnd C_C3 node2 Gnd C_C4 node3 Gnd C_C5 node4 Gnd C_C6 node5 Gnd C_C7 node6 Gnd C_C8 node7 Gnd C_C9 node8 Gnd C_C10 ...
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COPPER HEAT SPREADER AREA (mm Figure 25. SOIC− Function of the Pad Copper Area, Board Material FR4 JA 1000 100 50% Duty Cycle 20% 10% ...
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Parameter SOIC−8 EP Package Junction−to−Board (Y−JB Junction−to−Pin 6 (tab) (Y−JL6 JL6 Junction−to−Ambient ( qJA JA Package construction Without mold compound Figure 28. PCB Layout and Package Construction for Simulation PACKAGE THERMAL DATA ...
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Table 2. SOIC−8 EP THERMAL RC NETWORK MODELS* Drain Copper Area (1 oz thick) (SPICE Deck Format) C_C1 Junction Gnd C_C2 node1 Gnd C_C3 node2 Gnd C_C4 node3 Gnd C_C5 node4 Gnd C_C6 node5 Gnd C_C7 node6 Gnd C_C8 node7 ...
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COPPER HEAT SPREADER AREA (mm Figure 29. SOIC–8 Exposed Pad, θ the Pad Copper Area, Board Material FR4 100 50% Duty Cycle 20% 10 ...
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Parameter SOIC−8 EP Package Junction−to−Board-top (Y−JB Junction−to−Pin 3 (tab) (Y−JL3 JL3 Junction−to−Ambient ( qJA JA Package construction Without mold compound Figure 32. PCB Layout and Package Construction for Simulation PACKAGE THERMAL DATA ...
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Table 3. DPAK 5−LEAD THERMAL RC NETWORK MODELS* Drain Copper Area (1 oz thick) (SPICE Deck Format) C_C1 Junction Gnd C_C2 node1 Gnd C_C3 node2 Gnd C_C4 node3 Gnd C_C5 node4 Gnd C_C6 node5 Gnd C_C7 node6 Gnd C_C8 node7 ...
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2 100 200 COPPER HEAT SPREADER AREA (mm Figure 33. DPAK 5−Lead, θ Pad Copper Area, Board Material FR4 100 50% Duty Cycle ...
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... Figure 37. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder) ORDERING INFORMATION Device Order Number NCV8184DG NCV8184DR2G NCV8184DTRKG NCV8184PDG NCV8184PDR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...
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... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...
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... TOP VIEW A 0. 0.10 C SEATING PLANE A1 SIDE VIEW C *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 EP CASE 751AC−01 ISSUE B C A-B F EXPOSED PAD ...
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... Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein ...