ALD500RA-10SEL Advanced Linear Devices Inc, ALD500RA-10SEL Datasheet - Page 7
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ALD500RA-10SEL
Manufacturer Part Number
ALD500RA-10SEL
Description
IC ADC 17BIT 20SOIC
Manufacturer
Advanced Linear Devices Inc
Datasheet
1.ALD500RA-20SEL.pdf
(12 pages)
Specifications of ALD500RA-10SEL
Number Of Bits
17
Power Dissipation (max)
10mW
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ALD500RAU/ALD500RA/ALD500R
Table 1. Conversion Phase and Control Logic Internal Analog Switch Functions
Conversion
Phase
Auto Zero
Input Signal
Integration
Reference Voltage
Deintegration
Integrator
Output Zero
*SW +
PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R
would be closed for a positive input signal. SW -
I
C
V -
C
BUF
AGND
C
C
N/C
N/C
V -
V
V -
V
A
B
C
DGND
V
C
B
Symbol
+ REF
+ IN
+
INT
AZ
- REF
+ REF
OUT
S
REF
IN
A = 0, B = 1
A = 1, B = 0
A = 1, B = 1
A = 0, B = 0
Control
Logic
Bias circuit pin. Connect a 0.1 F capacitor from this pin to V - to minimize noise.
Integrator capacitor connection.
Negative power supply.
The Auto-zero capacitor connection.
The Integrator resistor buffer connection.
This pin is analog ground.
Negative reference capacitor connection.
Positive reference capacitor connection.
Internally connected. Connect to V - for normal operation.
Internally connected. Connect to V - for normal operation.
External voltage reference (-) connection. High impedance load ( 100M ) only.
External voltage reference (+) connection. High impedance load ( 100M ) only.
Negative analog input.
Positive analog input.
Converter phase control MSB Input.
Converter phase control LSB Input.
Comparator output. C
Digital ground.
Positive power supply.
Chip select - power down pin.
Description
is LOW when a negative input voltage is being integrated. A HIGH-to-LOW transition on C
that the Deintegrate phase is completed. C
time the Integrator Zero phase.
Connect
Input
Closed
SW
Open
Open
Open
IN
OUT
Reference Input
SW
is HIGH during the Integration phase when a positive input voltage is being integrated and
R
Advanced Linear Devices
would be closed for a negative input signal.
Logic 1 = power on. Logic 0 = power down.
Polarity
+ R or
Closed*
Open
Open
Open
SW
- R
OUT
is undefined during the Auto-Zero phase. It should be monitored to
Auto Zero
Switch Functions
SW
Closed
Open
Open
Open
AZ
Reference
Sample
Closed
Closed
SW
Open
Open
R
V
IN
Closed
Closed
Closed
=AGND
SW
OUT
Open
G
signals the processor
System
Offset
Closed
SW
Open
Open
Open
S
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