78Q2133/F Maxim Integrated Products, 78Q2133/F Datasheet - Page 16

• Manufacturer Part Number: 78Q2133/F
• Description: TXRX 10/100 MDIX 3.3V IND 32-QFN
• Manufacturer: Maxim Integrated Products
• Type: 10/100 Fast Ethernetr

Specifications of 78Q2133/F

• Operating Supply Voltage: 3.3 V
• Supply Current: 88 mA
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-32
• Mounting Style: SMD/SMT
• Operating Frequency: 25 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

78Q2123/78Q2133 Data Sheet
3.2
Bits 1.15 through 1.11 reflect the ability of the 78Q2123/78Q2133. They do not reflect any ability changes
made via the MII Management Interface to bits 0.13 (SPEEDSL) , 0.12 (ANEGEN) and 0.8 (DUPLEX) in
the Control Register.
16
1.15
1.14
1.13
1.12
1.11
1.10
Bit
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
MR1: Status Register
100T2_H
100T2_F
RFAULT
Symbol
100X_H
ANEGC
100X_F
ANEGA
10T_H
10T_F
100T4
RSVD
MFPS
EXTS
LINK
JAB
Type
RC
RC
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
(1)
0
1
1
1
1
0
0
0
0
0
0
0
0
0
Description
100BASE-T4 Ability: Reads ‘0’ to indicate the
78Q2123/78Q2133 do not support 100Base-T4 mode.
100BASE-TX Full Duplex Ability:
100BASE-TX Half Duplex Ability:
10BASE-T Full Duplex Ability:
10BASE-T Half Duplex Ability:
100BASE-T2 Full Duplex Ability: Reads ‘0’ to indicate the
78Q2123/78Q2133 do not support 100Base-T2 full duplex
mode.
100BASE-T2 Half Duplex Ability: Reads ‘0’ to indicate the
78Q2123/78Q2133 do not support 100Base-T2 full duplex
mode.
Extended Status Information Availability: Reads ‘0’ to indicate
the 78Q2123/78Q2133 do not support Extended Status
information on MR15.
Reserved
Management Frame Preamble Suppression Support: A “0”
indicates that the 78Q2123/78Q2133 can read management
frames with a preamble.
Auto-Negotiation Complete: A logic one indicates that the
Auto-Negotiation process has been completed, and that the
contents of registers MR4,5,6 are valid.
Remote Fault: A logic one indicates that a remote fault
condition has been detected and it remains set until it is
cleared. This bit can only be cleared by reading this register
(MR1) via the management interface.
Auto-Negotiation Ability: When set, this bit indicates the
device’s ability to perform Auto-Negotiation. The value of this
bit is determined by the
Link Status: A logic one indicates that a valid link has been
established. If the link status should transition from an OK
status to a NOT-OK status, this bit will become cleared and
remains cleared until it is read.
Jabber Detect: In 10Base-T mode, this bit is set during a
jabber event. After a jabber event, the bit remains set until
0 : Not able
1 : Able
0 : Not able
1 : Able
0 : Not able
1 : Able
0 : Not able
1 : Able
ANEGEN
bit (MR0.12).
DS_21x3_001
Rev. 1.6