RDK-252 Power Integrations, RDK-252 Datasheet
![KIT REF DESIGN DG CAPZERO](/photos/37/57/375735/rdk252_sml.jpg)
RDK-252
Specifications of RDK-252
Available stocks
Related parts for RDK-252
RDK-252 Summary of contents
Page 1
... However, such requirements may be satisfied by adding additional circuitry to the basic converter descriptions shown here. For more information on additional circuit capabilities, design examples and other information visit the Power Integrations web site or contact your PI sales representative. Scope This application note is intended for engineers designing an isolated AC-DC flyback power supply using the TOPSwitch-JX family of devices ...
Page 2
... TOPSwitch-JX Reference Design Kits (RDKs) useful. Each contains a fully functional engineering prototype board, engineering report and device samples. Further details on downloading PI Expert, and obtaining an RDK and updates to this document can be found at www.powerint.com. Quick Start Readers familiar with power supply design and Power Integrations ...
Page 3
AN-47 Step-by-Step Transformer Design Procedure Introduction The design flow allows for design of power supplies both with or without a peak output power requirement. For peak power requirements the device current limit is programmed to enable the delivery of peak ...
Page 4
Application Note DC INPUT VOLTAGE PARAMETERS VMIN VMAX Figure 4. DC Input Voltage Parameters Showing Grey Override Cells for DC Input Designs. Nominal Output Voltage, V (V) O Enter the nominal output voltage of the main output during the continuous ...
Page 5
AN-47 Step 2 – Enter TOPSwitch-JX Variables: Device, Current Limit Select the Correct TOPSwitch-JX Device First, refer to the TOPSwitch-JX power table and select a device based on the peak output ...
Page 6
Application Note V Value Performance Goal OR Suggestion Maximum output power / 135 V smallest TOPSwitch-JX Device Highest Efficiency 100 V - 120 V Gives lowest overall Multiple Output Design 110 V Table 4. Suggested Values for ...
Page 7
AN-47 PROTECTION FEATURES LINE SENSING VUV_STARTUP VOV_SHUTDOWN RLS OUTPUT OVERVOLTAGE VZ RZ OVERLOAD POWER LIMITING Overload Current Ratio at VMAX Overload Current Ratio at VMIN ILIMIT_EXT_VMIN ILIMIT_EXT_VMAX RIL RPL CURRENT WAVEFORM SHAPE PARAMETERS DMAX IAVG IP IR IRMS Figure 8. ...
Page 8
Application Note ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type Core Bobbin Figure 9. Transformer Core and Construction Variables Section of Spreadsheet. Output Power Limiting vs. Input Voltage (Optional) The X pin on the TOPSwitch-JX ...
Page 9
AN-47 Table 5 provides a list of commonly available cores and power levels at which these cores can be used for typical designs. Safety Margin, M (mm) For designs that require safety isolation between primary and secondary but do not ...
Page 10
Application Note TRANSFORMER PRIMARY DESIGN PARAMETERS LP LP Tolerance NP NB ALG BM BP BAC ur LG BWE OD INS DIA AWG CM CMA Primary Current Density (J) Figure 10. Transformer Primary Design Parameters Section of Spreadsheet. TRANSFORMER SECONDARY DESIGN ...
Page 11
AN- Optional Figure 12. Typical TOPSwitch-JX Flyback Power Supply Using Optocoupler-TL431 Feedback Circuit. VR CLAMP R CLAMP C CLAMP R CLAMP2 D CLAMP D CONTROL S X (a) Figure 13. Recommended ...
Page 12
Application Note In multiple output design NSx, CMSx, AWGSx (where x is the output number) should also be used. Step 6 – Selection of TOPSwitch-JX External Components CONTROL Pin – External Components The schematic in Figure 12 shows the external ...
Page 13
AN-47 Figure 13a shows an example of an RCD + Zener clamp. During normal operation the Zener diode does not conduct, clamping is provided by R and C . This allows the values to be CLAMP CLAMP optimized for full ...
Page 14
Application Note The peak drain voltage should be limited to a maximum of 675 V under these conditions to provide a margin for component variation. The clamp diode (D ) must be a fast or an ultra- CLAMP fast recovery ...
Page 15
AN-47 From Output L Capacitor TL-431 Figure 16. Typical “Type 2” Controller Implementation Using TOPSwitch-JX. From Output L Capacitor TL-431 Figure 17. Modified “Type 2” Controller ...
Page 16
Application Note Maximize Copper Area for Optimum Heat Sinking RLS1 RPL1 U1 RIL CBP Input Filter Capacitor Figure 18a. Layout Considerations for TOPSwitch-JX Using V-Package. Input Filter Capacitor CBP C RLS2 ...
Page 17
AN-47 R and the optocoupler LED determine the output voltage. D Resistor R provides bias current so that the Zener BIAS diode is operating close to its knee voltage. Resistor R the DC gain of the feedback. ...
Page 18
Application Note ✓ Recommended Layout C B+ CLAMP Line sense resistor (R ) connected at LS input capacitor R placed LS physically close to V pin TOPSwitch-JX CONTROL R placed C IL physically close to X ...
Page 19
AN- OVP OVP D V CONTROL Figure 20. Primary Sensed OVP circuit for TOPSwitch-JX Based Flyback Power Supply 1N4148 OVP D V CONTROL C 100 Figure 21. Primary ...
Page 20
Application Note Power Meter A 16 mΩ MΩ IN (a) Low Power (<100 W) and No-load Power Input Power Measurements Figure 25. Correct Power Meter Configurations for Accurate Measurement of Low Power / No-load and Higher Power ...
Page 21
AN-47 Figure 27. No-load Input Power Settling time. (Points Represent Instantaneous Measurements From Power Meter With No Filtering, Line Represents Averaged Measurements). Minimize Output Pre-Loads Output pre-loads are not required in single output TOPSwitch-JX designs and may be removed. In ...
Page 22
Application Note + Typ. 65 VAC brownout threshold. < latch reset time. Higher gain Q decreasing C1 for lower no-load input power CONTROL Input Voltage Figure 28. Externally Set Current ...
Page 23
AN-47 In some designs the Zener diode connected from the bias winding may become a source of noise injected into the V pin. This happens when the bias winding output ripple is high, or the circuit board layout allows noise ...
Page 24
Application Note drain current waveforms at start-up for any signs of transformer saturation and excessive leading edge current spikes. TOPSwitch-JX has a minimum leading edge blanking time of 180 ns to prevent premature termination of the ON-cycle. Verify that the ...
Page 25
AN-47 Appendix A Application Example Low No-load, High Efficiency Universal Input Adapter Power Supply The circuit shown in Figure 31 shows a 90 VAC to 265 VAC input 3.42 A output power supply, designed for operation ...
Page 26
Application Note JX MOSFET. This arrangement was selected over a standard RCD clamp to improve light load efficiency and no-load input power standard RCD clamp C4 would be discharged by a parallel resistor rather than a resistor and ...
Page 27
AN-47 the device heatsink. The subsequent thermal and efficiency data confirmed this choice. The maximum device temperature was 107°C at full load, 40 °C, 85 VAC (worst case conditions) and average efficiency exceeded 83% ENERGY STAR and EuP ...
Page 28
Application Note value (defined by the voltage rating of VR1) and therefore minimizing clamp dissipation under light and no-load conditions. Zener VR1 is shown as a high peak dissipation capable TVS however a standard lower cost Zener may also be ...
Page 29
AN-47 Appendix B Multiple Output Flyback Power Supply Design The only difference between a multiple output flyback power supply and a single output flyback power supply of the same total output power is on the secondary side design. Design with ...
Page 30
... The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www ...