73S8009CN-DB Maxim Integrated Products, 73S8009CN-DB Datasheet - Page 14

• Manufacturer Part Number: 73S8009CN-DB
• Description: BOARD DEMO FOR 73S8009CN
• Manufacturer: Maxim Integrated Products

Specifications of 73S8009CN-DB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

73S8009CN Demo Board User Manual
5 73S8009CN Demo Board Schematics, PCB Layouts and Bill of
5.1
14
Note: VPCIN
must be
between 2.7
and 6.5V
J1 and J3 are placed on the bottom.
are placed on the top side.
J1 and J3 must be aligned with J8 and J9 on the
1121 evaluation board (E1121T8) respectivly in
order for this board to be stacked on it.
J1 must be aligned with J2 and J3 must be
aligned with J4 in order for this daughter
board to be stacked on another.
Materials
OFF_ACK
OFF_REQ
CMDVCC5
CMDVCC3
Schematics
SCIOEN
VPCIN
VPCIN
RSTIN
+3.3V
SCLK
SSM_110_L_SV
TSM_110_01_L_SV
SSM_110_L_SV
TSM_110_01_L_SV
SIO
SC4
SC8
OFF
GND
GND
GND
RDY
GND
CS
J1
10
J2
10
J3
10
J4
10
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
VPCIN
3.3V
J2 and J4
Figure 4: 73S8009CN Electrical Schematic
CS
Disable
Note: JP4 pins 1
and 2 should only
be connected when
3.3V is not sourced
from the mating
board (if
applicable)
R2
R3
R1
R4
R6
R5
C1, C2, C3 and L1 must be placed
within 5mm of the U1 pins and
connected by thick track (wider
than 0.5mm)
Note: JP4 pins 1
and 2 must not be
connected with JP2
pins 1 and 2 at the
same time.
47K
47K
10K
1K
47K
47K
JP7
1
2
IOUC
AUX1UC
AUX2UC
CMDVCC%
CMDVCC#
RSTIN
CLKIN
RDY
OFF_ACK
OFF_REQ
CS
CS
0.1uF
C5
JP4
1
2
0.1uF
U1
73S8009CN
1
2
3
4
5
6
7
8
C3
3.3V
IOUC
AUX1UC
AUX2UC
CMDVCC5B
CMDVCC3B
RSTIN
CLKIN
RDY
3.3V
3.3V
VDD
L1
R14
100K
JP2
ON/OFF
R10
Ru
DNI
R13
Rd
DNI
C1
C2
SIM Force
Detect
AUX1
AUX2
CLK
GND
VCC
RST
VPCIN
JP1
DM
I/O
C4
4.7uF
VPC
SELECT
10uF
I/O
C8
24
23
22
21
20
19
18
17
0.1uF
TP9
TP4
TP6
1
VDD
R7 0
1
2
1
2
J5
IO
AUX1
AUX2
VCC
RST
Smart Card Connector
TP10
+5VDC
GND
D+
D-
J7
USB_CONN_4
JP3
R8
Ru
DNI
R11
Rd
DNI
GND
GND
GND
VCC
Note: Pin 5 to 8 are near edge of board.
D+
D-
TP3
TP5
TP7
TP8
J6
SIM/SAM Connector
1
2
1
2
1
2
1
2
5
4
3
2
1
6
1
UM_8009CN_060
S1 SW
R9
Ru
DNI
R12
Rd
DNI
VCC
RST
CLK
C4
2
R8 to R13 and C36 to be
placed within 1cm of
J7.
TP3 to TP8, C9, C11 and
C12 are to be placed
very close to the pads
of J5
Rev. 1.1
C12
27pF
TP1
TP2
2
1
2
1
C9
27pF
C11
0.47uF