73M1903-EVM-ETSI Maxim Integrated Products, 73M1903-EVM-ETSI Datasheet - Page 43

• Manufacturer Part Number: 73M1903-EVM-ETSI
• Description: BOARD DEMO 73M1903 ETSI 203IMPED
• Manufacturer: Maxim Integrated Products

Specifications of 73M1903-EVM-ETSI

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -

Pdvsr = Integer [ Fxtal/Fref] = 10 = Ah;
Prst[2:0] = 1- 1 = 0 from Fref/Fxtal = 24.576/2.4576 = 10/1;
1903B has a built in PLL circuit to allow an operation over wide range of Fs. It is of a conventional design
with the exception of an NCO based feedback divider. See
dictates that the PLL output frequency, Fvco, be related to the sampling rate, fs, by fvco = 2 x 2304 x fs.
The nco must function as a divider whose divide ratio equals Fref/Fvco.
Just as in the NCO pre-scaler, a set of three numbers– Ndvsr (7 bits), Nrst (3 bit ) and Nseq (8 bits)
must be entered through a serial port to effect this divide:
Ndvsr = Integer [ Fref/Fxtal ] ;
Nrst = denominator of the ratio (Fvco/Fref), Dnco1, minus 1, when it is expressed as a ratio of two
smallest integers = Nnco1/Dnco1;
Nseq = Divide Sequence
Example 1:
DS_1903_032
Example 2:
Fxtal = 18.432 MHz, Fref = 2.304 MHz.
Pdvsr = Integer [Fxtal/Fref] = 8 = 8h;
Prst[2:0] = 1- 1 = 0 from Fref/Fxtal = 18.432/2.304 = 8/1;
Pseq = {x,x,x,x,x,x,x,x} = xxh
Example 3:
Fxtal = 24.576 MHz, fref = 2.4576 MHz.
Pseq = {x,x,x,x,x,x,x,x} = xxh
It is also important to note that when Fxtal/Fref is an integer the output of the pre-scaler is a straight
frequency divider (example 2). As such there will be no jitter generated at Fref. However if Fxtal/Fref is
a fractional number, Fref, at the output of the pre-scaler NCO would be exact only in an average sense
(example 1) and there will be a certain amount of fixed pattern (repeating) jitter associated with Fref which
can be filtered out by the PLL that follows by appropriately programming the PLL. It is important to note,
however, that the fixed pattern jitter does not degrade the performance of the sigma delta modulators so
long as its frequency is >> 4 kHz.
PLL
Fs = 7.2 kHz or Fvco = 2 x 2304 x 7.2 kHz =33.1776 MHz, Fref = 1.728 MHz.
Ndvsr = Integer [ Fvco/Fref ] = 19
Nrst = 5 – 1 = 4 from Fvco/Fref = 19.2 = 96/5;
Nseq = ÷19, ÷19, ÷19, ÷19, ÷20 => {0,0,0,0,1} =xxx00001 = 01h.
Rev. 2.1
Prescaler
NCO
Fref
PFD
Ichp Control
Dn
Up
Figure 18: PLL Block Diagram
Kd
3
Charge
Pump
NCO
Kvco Control
C1
R1
Figure
C2
18. The architecture of the 73m1903
Kvco
VCO
3
73M1903 Data Sheet
Divide
by 2/1
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