AD6623S/PCB Analog Devices Inc, AD6623S/PCB Datasheet - Page 9

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AD6623S/PCB

Manufacturer Part Number
AD6623S/PCB
Description
BOARD EVAL SGNL PROCESSOR AD6623
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6623S/PCB

Rohs Status
RoHS non-compliant
Module/board Type
Evaluation Board
For Use With/related Products
AD6623
Lead Free Status / Rohs Status
Not Compliant
TIMING DIAGRAMS—INM MICROPORT MODE
REV. A
WR (RW)
(DTACK)
WR (RW)
RD (DS)
(DTACK)
RD (DS)
A[2:0]
D[7:0]
Figure 12. INM Microport Write Timing Requirements
Figure 13. INM Microport Read Timing Requirements
A[2:0]
D[7:0]
CLK
RDY
NOTES
1.
2.
CLK
RDY
CS
CS
NOTES
1.
2.
t
t
MEASURED FROM FE OF WR TO THE RE OF RDY.
ACC
ACC
TIME IS MEASURED FROM FE OF WR TO THE RE OF RDY.
t
t
A[2:0] = 7, 6, 5, 3, 2, 1
ACC
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
REQUIRES A MAXIMUM 9 CLK PERIODS.
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS
REQUIRES A MAXIMUM OF 13 CLK PERIODS AND APPLIES TO
t
t
t
VALID ADDRESS
SAM
SAM
SAM
t
VALID DATA
t
SC
ZD
t
t
t
DRDY
SC
DRDY
t
t
ACC
ACC
t
t
HAM
HAM
VALID ADDRESS
t
DD
t
t
HC
HWR
VALID DATA
t
HAM
t
HC
t
ZD
–9–
TIMING DIAGRAMS—MNM MICROPORT MODE
RW (WR)
DS (RD)
DTACK
RW (WR)
Figure 14. MNM Microport Write Timing Requirements
DS (RD)
Figure 15. MNM Microport Read Timing Requirements
A[2:0]
D[7:0]
DTACK
(RDY)
A[2:0]
D[7:0]
CLK
NOTES
1.
2.
(RDY)
CS
CLK
NOTES
1.
2.
t
MEASURED FROM FE OF DS TO THE FE OF DTACK.
t
CS
ACC
ACC
t
MEASURED FROM FE OF DS TO THE FE OF DTACK.
t
ACC
ACC
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
REQUIRES A MAXIMUM 13 CLK PERIODS.
ACCESS TIME DEPENDS ON THE ADDRESS ACCESSED. ACCESS TIME IS
REQUIRES A MAXIMUM 9 CLK PERIODS.
t
VALID ADDRESS
t
t
SAM
SAM
SAM
VALID DATA
t
t
SC
ZD
t
SC
t
t
ACC
ACC
t
t
t
t
HAM
HDS
HAM
HDS
t
DD
t
VALID ADDRESS
DDTACK
t
t
VALID DATA
HC
HRW
t
HC
t
HAM
t
DDTACK
AD6623
t
ZD

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