MAX1471EVSYS-433 Maxim Integrated Products, MAX1471EVSYS-433 Datasheet - Page 21
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MAX1471EVSYS-433
Manufacturer Part Number
MAX1471EVSYS-433
Description
EVAL KIT FOR MAX1471 433MHZ
Manufacturer
Maxim Integrated Products
Type
Receiver, ASK/FSKr
Datasheet
1.MAX1471EVKIT-433.pdf
(26 pages)
Specifications of MAX1471EVSYS-433
Frequency
433MHz
For Use With/related Products
MAX1471 ~ 433 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 6. Power Configuration Register (Address: 0x0)
ing once t
modules selected in the power control register (register
0x0) are powered up with the exception of the peak
detectors and have the t
At the end of t
and enables ADATA, FDATA, and peak detectors if
chosen to be active in the power configuration register
(0x0). The CPU must be awake at this point, and must
hold DIO low for the MAX1471 to remain in operation.
The CPU must begin driving DIO low any time during
t
DIO is pulled high through the internal pullup resistor,
and the timer sequence is restarted, leaving the
MAX1471 powered down. Any time the DIO line is dri-
ven high while the DRX = 1, the DRX sequence is initi-
ated, as defined in Figure 12.
t
(upper byte) and 0x8 (lower byte). The possible t
tings are in Table 12. The data written to the t
(0x7 and 0x8) is multiplied by 120µs to give the total t
time. On power-up, the RF timer registers are set to
zero and must be written before using DRX mode.
LOW
RF
ASKBB_EN
ASKPD_EN
FSKBB_EN
FSKPD_EN
MIXER_EN
AGC_EN
is a 16-bit timer, configured through registers 0x7
LNA_EN
SLEEP
BIT ID
= t
CPU
CPU
+ t
has expired. At the beginning of t
RF
RF
detector enable
detector enable
, the MAX1471 stops driving DIO low
FSK baseband
ASK baseband
______________________________________________________________________________________
Mixer enable
AGC enable
Sleep mode
LNA enable
BIT NAME
. If the CPU fails to drive DIO low,
ASK peak
FSK peak
enable
enable
RF
period to settle.
ASK/FSK Superheterodyne Receiver
315MHz/434MHz Low-Power, 3V/5V
BIT LOCATION
(0 = LSB)
7
6
5
4
3
2
1
0
RF
register
RF
RF
, the
set-
RF
POWER-UP
STATE
0
0
0
0
0
0
0
0
Here is a typical power-up procedure for receiving either
ASK or FSK signals at 315MHz in continuous mode:
1) Write 0x3000 to reset the part.
2) Write 0x10FE to enable all RF and baseband sections.
3) Write 0x135F to set the oscillator frequency register
4) Write 0x1120 to set FSKCALLSB for an accurate
5) Write 0x1201 to begin FSK calibration.
6) Read 0x2900 and verify that bit 0 is 1 to indicate
The MAX1471 is now ready to receive ASK or FSK data.
Due to the high sensitivity of the receiver, it is recom-
mended that the configuration registers be changed
only when not receiving data. Receiver desensitization
may occur, especially if odd-order harmonics of the
SCLK line fall within the IF bandwidth.
to work with a 315MHz crystal.
FSK calibration.
FSK calibration is done.
1 = Enable LNA
0 = Disable LNA
1 = Enable AGC
0 = Disable AGC
1 = Enable mixer
0 = Disable mixer
1 = Enable FSK baseband
0 = Disable FSK baseband
1 = Enable FSK peak detectors
0 = Disable FSK peak detectors
1 = Enable ASK baseband
0 = Disable ASK baseband
1 = Enable ASK peak detectors
0 = Disable ASK peak detectors
1 = Deep-sleep mode
0 = Normal operation
Typical Power-Up Procedure
FUNCTION
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