MCP2030-I/ST Microchip Technology, MCP2030-I/ST Datasheet - Page 53

• Manufacturer Part Number: MCP2030-I/ST
• Description: IC KEYLESS ENTRY AFE 14TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP2030-I/ST

• Rf Type: ISM
• Frequency: 125kHz
• Features: 10kbps
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 5-4:
REGISTER 5-5:
© 2005 Microchip Technology Inc.
bit 8-7
bit 6-1
bit 0
Legend:
R = Readable bit
-n = Value at POR
bit 8-5
bit 4-1
bit 0
Legend:
R = Readable bit
-n = Value at POR
bit 8
Unimplemented: Read as ‘0’
LCZTUN<5:0>: LCZ Tuning Capacitance bit
000000 = +0 pF (Default)
111111 = +63 pF
R3PAR: Register 3 Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set bits
LCXSEN<3:0>
0000 = -0 dB (Default)
0001 = -2 dB
0010 = -4 dB
0011 = -6 dB
0100 = -8 dB
0101 = -10 dB
0110 = -12 dB
0111 = -14 dB
1000 = -16 dB
1001 = -18 dB
1010 = -20 dB
1011 = -22 dB
1100 = -24 dB
1101 = -26 dB
1110 = -28 dB
1111 = -30 dB
LCYSEN<3:0>
0000 = -0 dB (Default)
1111 = -30 dB
R4PAR: Register 4 Parity bit – set/cleared so the 9-bit register contains odd parity – an odd number of set bits
LCXSEN3 LCXSEN2 LCXSEN1 LCXSEN0 LCYSEN3 LCYSEN2 LCYSEN1 LCYSEN0
bit 8
CONFIGURATION REGISTER 3 (ADDRESS: 0011)
CONFIGURATION REGISTER 4 (ADDRESS: 0100)
R/W-0
Note 1: Assured monotonic increment (or decrement) by design.
U-0
—
:
R/W-0
U-0
(1)
(1)
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
: Typical LCX Sensitivity Reduction bit
: Typical LCY Sensitivity Reduction bit
:
LCZTUN5 LCZTUN4 LCZTUN3 LCZTUN2 LCZTUN1 LCZTUN0
R/W-0
R/W-0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
MCP2030
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
DS21981A-page 53
R3PAR
R4PAR
R/W-0
R/W-0
bit 0
bit 0