LTC1758-2EMS#TR Linear Technology, LTC1758-2EMS#TR Datasheet - Page 8

• Manufacturer Part Number: LTC1758-2EMS#TR
• Description: IC RF PWR CONTROLLR DUAL 10-MSOP
• Manufacturer: Linear Technology

Specifications of LTC1758-2EMS#TR

• Rf Type: Cellular, GSM, GPRS, PCS, Wireless Modem, TDMA
• Frequency: 850MHz ~ 2GHz
• Features: Dual Output
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC1758-2EMSTR

LTC1758-1/LTC1758-2
APPLICATIO S I FOR ATIO
LTC1758-1 Description
The LTC1758-1 is identical in performance to the
LTC1758-2 except that only one control output (V
available. The LTC1758-1 can drive a single band (850MHz
to 2000MHz) or a dual RF channel module with an
internal mulitplexer. Several manufacturers offer dual RF
channel modules with an internal mulitplexer.
General Layout Considerations
The LTC1758-1/LTC1758-2 should be placed near the
directional coupler. The feedback signal line to the RF pin
should be a 50 transmission line with optional termina-
tion or a short line. If short-circuit protection is used,
bypass capacitors are required at V
External Termination
The LTC1758 has an internal 200 termination resistor at
the RF pin. If a directional coupler is used, it is recom-
mended that an external 68
connected between the RF coupling capacitor (33pF), and
ground at the side connected to the directional coupler. If
the termination is placed at the LTC1758 RF pin, then the
68 resistor must be connected to V
is referenced to V
placed adjacent to the LTC1758.
Power Ramp Profiles
The external voltage gain associated with the RF channel
can vary significantly between RF power amplifier types.
The LTC1758 frequency compensation has been opti-
mized to be stable with several different power amplifiers
and manufacturers. This frequency compensation gener-
ally defines the loop dynamics that impact the power/time
response and possibly (slow loops) the power ramp
sidebands. The LTC1758 operates open loop until an RF
voltage appears at the RF pin, at which time the loop closes
and the output power follows the DAC profile. The RF
power amplifier will require a certain control voltage level
(threshold) before an RF output signal is produced. The
LTC1758 V
old voltage in order to meet the power/time profile. To
reduce this time, the LTC1758 starts at 600mV. However,
at very low power levels the PCTL input signal is small, and
8
PCA/B
outputs must quickly rise to this thresh-
IN
U
. Termination components should be
U
termination resistor be
W
CC
IN
.
since the detector
U
PCA
) is
the V
reach the RF power amplifier threshold voltage. To reduce
this time, it may be necessary to apply a positive pulse at
the start of the ramp to quickly bring the V
the threshold voltage. This can generally be achieved with
DAC programming. The magnitude of the pulse is depen-
dent on the RF amplifier characteristics.
Power ramp sidebands and power/time are also a factor
when ramping to zero power. For RF amplifiers requiring
high control voltages, it may be necessary to further adjust
the DAC ramp profile. When the power is ramped down the
loop will eventually open at power levels below the LTC1758
detector threshold. The LTC1758 will then go open loop
and the output voltage at V
this voltage is high enough to produce RF output power,
the power/time or power ramp sidebands may not meet
specification. This problem can be avoided by starting the
DAC ramp from 100mV (Figure 1). At the end of the cycle,
the DAC can be ramped down to 0mV. This applies a
negative signal to the LTC1758 thereby ensuring that the
V
must be applied at least 4 s before TXEN is asserted high
PCA/B
SHDN
TXEN
–10
–20
–30
–40
–50
–60
–70
–80
10
0
PCA/B
100mV
START
CODE
outputs will ramp to 0V. The 100mV ramp step
–28
outputs may take several microseconds to
START
PULSE
Figure 1. LTC1758 Ramp Timing
50 s MINIMUM, ALLOWS TIME FOR DAC
AND AUTOZERO TO SETTLE
–18
–10
0
PCA
TIME ( s)
or V
PCB
543
will stop falling. If
553
PCA/B
561
outputs to
571
ZERO
CODE
1758 F01