TDA7511 STMicroelectronics, TDA7511 Datasheet - Page 15

• Manufacturer Part Number: TDA7511
• Description: IC TUNER HI/FI AM/FM 64TQFP
• Manufacturer: STMicroelectronics

Specifications of TDA7511

• Frequency: 3.6kHz
• Modulation Or Protocol: AM, FM
• Applications: Automotive Audio, processing, receivers
• Current - Receiving: 60mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 7.5 V ~ 10 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Other names: 497-3988

Hence the demodulator output signal is detected. A lowpass filtering and peak rectifier generates a signal that
is defined by software controlled current (TDEV) in an external capacitance. This value is compared with a pro-
grammable comparator3 thresholds (DWTH, DTH) and generates two digital signals (dev, dev+).
ISS Switch Logic
All digital signals coming from adjacent channel detector, deviation detector and softmute are acting via switch-
ing matrix on ISS filter switch. The IF bandpass switch mode is controlled by software (ISSON, ISS30, ISS80,
ISSCTL). The switch ON of the IF bandpass is also available by manipulation of the voltage at PIN15. Two ap-
plication modes are available (APPM). The conditions are described in table 37.
1.5
The external fieldstrength signal at PIN 35 is the reference for mute control. The startpoint, mute depth and slope
are programmable (SMTH, SMD, SLOPE) in a wide range. The time constant is defined by external capacitance.
Additional adjacent channel mute function is supported. A highpass filter with -3dB threshold frequency of
100kHz, amplifier and peak rectifier generates an adjacent noise signal from MPX output with the same time con-
stant for softmute. This value is compared with comparator5 thresholds (ACM). For present strong adjacent chan-
nel the MPX signal is attenuated typical 6dB.
1.6
The upconversion mixer1 is combined with a gain control circuit 1 sensing three input signals, narrow band in-
formation at PIN 39, upconversion signal at PIN 58 and wide band information at PIN 3.This gain control circuit
gives two output signals. The first one is a current for pin diode attenuator and the second one is a voltage for
preamplifier. It is possible to put in a separate narrow bandpass filter before mixer2 at PIN 58. The intervention
point for first AGC (AMAGC) is programmable by software.
The oscillator frequency for mixer1 is generated by dividing the FM VCO frequency (AMD).
In mixer2 the IF1 is downconverted into the IF2 450kHz. Before the output signal reaches the 450kHz tank an
attenuator for IF gain control 2 is passed. Mixer1 and mixer2 tanks are software controlled adjustable
(IF1T, IF2T).
After filtering by ceramic filter a 450kHz amplifier with a gain control 3 is included. The gain control 2 and 3 are
the second AGC and programmable too by software (DAGC). In order to avoid an oscillation in intervention point
it is important to know that the DAGC threshold has to be smaller than AMAGC! .
The demodulator is a peak detector. A further time constant with capacitor at pin40 produces a DC AGC refer-
ence voltage dependent on input signal. The time constant is switchable by ratio of 30. This is necessary for the
station search function. The switching is software controlled (AMSEEK).
An internal comparator compares the AGC voltage with a programmable reference (AMSS). Consequently it is
possible to generate a seekstop impulse over a defined range.
A separate output is available for AMIF stereo or a permanent seek stop signal(SSTSEL).
1.7
PLL Frequency Synthesizer Block
This part contains a frequency synthesizer and a loop filter for the radio tuning system. Only one VCO is required
to build a complete PLL system for FM and AM upconversion. For auto search stop operation an IF counter
system is available.
The counter works in a two stages configuration. The first stage is a swallow counter with a two modulus (32/33)
precounter. The second stage is an 11-bit programmable counter.
The circuit receives the scaling factors for the programmable counters and the values of the reference frequen-
cies via an I
followed by the reference divider. The reference and step-frequencies are free selectable (RC, PC).
Output signals of the phase detector are switching the programmable current sources. The loop filter integrates
Soft Mute Control
AM Section
PLL and IF Counter Section
2
C-Bus interface.The reference frequency is generated by an adjustable internal (XTAL) oscillator
TDA7511
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