ADF7020BCPZ Analog Devices Inc, ADF7020BCPZ Datasheet - Page 28

• Manufacturer Part Number: ADF7020BCPZ
• Description: IC TX FSK/ASK ISM BAND 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADF7020BCPZ

• Design Resources: Low power, Long Range, ISM Wireless Measuring Node (CN0164)
• Frequency: 431MHz ~ 478MHz and 862MHz ~ 956MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Data Transfer, RKE, Remote Control/Security Systems
• Power - Output: -16dBm ~ 13dBm
• Sensitivity: -119dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 19mA
• Current - Transmitting: 26.8mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Data Rate: 200Kbps
• Supply Voltage Range: 2.3V To 3.6V
• Logic Case Style: LFCSP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Termination Type: SMD
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7020DBZ3 - BOARD EVAL ADF7020 433-445MHZEVAL-ADF7020DBZ2 - BOARD EVAL ADF7020 862-870MHZEVAL-ADF7020DBZ1 - BOARD EVAL ADF7020 902-928MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7020
POWER CONSUMPTION AND BATTERY LIFETIME
CALCULATIONS
Average Power Consumption can be calculated using
Table 11. Power-Up Sequence Description
Parameter
t
t
t
t
t
t
t
t
t
0
1
2
6
4
8
9
10
11
, t
, t
3
7
, t
Average Power Consumption = (t
I
PowerDown
5
,
19mA TO
)/( t
3.65mA
Value
2 ms
10 μs
32 × 1/SPI_CLK
1 ms
150 μs
5 × Bit_Period
48 × Bit_Period
Packet Length
2.0mA
22mA
14mA
ON
+ t
READY
OFF
REG.
t
1
)
WR0
t
2
WR1
Description
Crystal starts power-up after CE is brought high. This typically depends
on the crystal type and the load capacitance specified.
Time for regulator to power up. The serial interface can be written to after
this time.
Time to write to a single register. Maximum SPI_CLK is 25 MHz.
The VCO can power-up in parallel with the crystal. This depends on the
CVCO capacitance value used. A value of 22 nF is recommended as a
trade-off between phase noise performance and power-up time.
This depends on the number of gain changes the AGC loop needs to cycle
through and AGC settings programmed. This is described in more detail
in the AGC Information and Timing section.
This is the time for the clock and data recovery circuit to settle. This typically
requires 5-bit transitions to acquire sync and is usually covered by the
preamble.
This is the time for the automatic frequency control circuit to settle. This
typically requires 48-bit transitions to acquire lock and is usually covered
by an appropriate length preamble.
Number of bits in payload by the bit period.
t
3
XTAL
t
0
ON
× I
VCO
t
4
AVG_ON
Figure 39. Rx Programming Sequence and Timing Diagram
WR3
+ t
t
5
OFF
WR4
t
6
×
WR6
t
7
t
ON
Rev. B | Page 28 of 48
AGC/
RSSI
t
8
CDR
t
9
AFC
Using a sequenced power-on routine like that illustrated in
Figure 39 can reduce the I
overall power consumption. When used in conjunction with a
large duty-cycle or large t
increased battery life. Analog Devices, Inc. ’ s free design tool,
ADI SRD Design
t
10
Rx
DATA
t
11
Studio, can assist in these calculations.
OFF
AVG_ON
, this can result in significantly
current and, hence, reduce the
t
Signal to Monitor
CLKOUT pin
MUXOUT pin
CVCO pin
Analog RSSI on TEST_A pin
(Available by writing 0x3800 000C)
OFF
TIME