EM357-MOD-ANT-TG Ember, EM357-MOD-ANT-TG Datasheet - Page 54
![MODULE EM357 NO PA/LNA W/ANT TG](/photos/14/21/142173/em357-mod-ant-tg_sml.jpg)
EM357-MOD-ANT-TG
Manufacturer Part Number
EM357-MOD-ANT-TG
Description
MODULE EM357 NO PA/LNA W/ANT TG
Manufacturer
Ember
Specifications of EM357-MOD-ANT-TG
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
25mA
Current - Transmitting
42mA
Data Interface
PCB, Surface Mount
Memory Size
192kB Flash, 12kB RAM
Antenna Connector
On-Board, Chip
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Applications
-
Sensitivity
-
Other names
636-1018
- Current page: 54 of 245
- Download datasheet (12Mb)
7
7.1
GPIO (General Purpose Input / Output)
GPIO Ports
The EM35x has 24 multi-purpose GPIO pins, which may be individually configured as:
The basic structure of a single GPIO is illustrated in Figure 7-1.
A Schmitt trigger converts the GPIO pin voltage to a digital input value. The digital input signal is then always
routed to the GPIO_PxIN register; to the alternate inputs of associated peripheral devices; to wake detection
logic if wake detection is enabled; and, for certain pins, to interrupt generation logic. Configuring a pin in
analog mode disconnects the digital input from the pin and applies a high logic level to the input of the
Schmitt trigger.
Only one device at a time can control a GPIO output. The output is controlled in normal output mode by the
GPIO_PxOUT register and in alternate output mode by a peripheral device. When in input mode or analog
mode, digital output is disabled.
The 24 GPIO pins are grouped into three ports: PA, PB, and PC. Individual GPIOs within a port are numbered 0
to 7 according to their bit positions within the GPIO registers.
Note: Because GPIO port registers’ functions are identical, the notation Px is used here to refer to PA, PB, or
PC. For example, GPIO_PxIN refers to the registers GPIO_PAIN, GPIO_PBIN, and GPIO_PCIN.
General purpose output
General purpose open-drain output
Alternate output controlled by a peripheral device
Alternate open-drain output controlled by a peripheral device
Analog
General purpose input
General purpose input with pull-up or pull-down resistor
Figure 7-1. GPIO Block Diagram
Final
7-1
EM351 / EM357
120-035X-000G
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