SI4421-A0-FT Silicon Laboratories Inc, SI4421-A0-FT Datasheet - Page 19

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SI4421-A0-FT

Manufacturer Part Number
SI4421-A0-FT
Description
IC TXRX FSK 915MHZ 3.8V 16-TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4421-A0-FT

Frequency
433MHz, 868MHz, 915MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK
Applications
ISM
Power - Output
7dbm
Sensitivity
-110dBm
Voltage - Supply
2.2 V ~ 3.8 V
Current - Receiving
15mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1737-5

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Bits 4-3 (g1 to g0):
Bits 2-0 (r2 to r0):
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
6. Data Filter Command
Bit 7 (al): Clock recovery (CR) auto lock control
Bit 6 (ml): Clock recovery lock control
Bit 4 (s):
Bit
RSSI
Filter Capacitor Value
Data Rate [kbps]
15
1
th
Select the type of the data filter:
Note: Bit rate cannot exceed 115 kpbs in this mode.
=RSSI
14
1
setth
1: auto mode: the CR starts in fast mode, after locking it switches to slow mode. Bit 6 (ml) has no effect.
0: manual mode, the clock recovery mode is set by Bit 6 (ml)
1: fast mode, fast attack and fast release (4 to 8-bit preamble (1010...) is recommended)
0: slow mode, slow attack and slow release (12 to 16-bit preamble is recommended)
Using the slow mode requires more accurate bit timing (see Data Rate Command, page 17).
Digital: This is a digital realization of an analog RC filter followed by a comparator with hysteresis. The time
constant is automatically adjusted to the bit rate defined by the Data Rate Command (page 17).
Analog RC filter: The demodulator output is fed to pin 7 over a 10 kOhm resistor. The filter cut-off frequency is set
by the external capacitor connected to this pin and VSS.
The table shows the optimal filter capacitor values for different data rates
Note: If analog RC filter is selected the internal clock recovery circuit and the FIFO cannot be used.
13
+G
0
LNA gain select:
RSSI detector threshold:
LNA
12
0
12 nF
1.2
11
0
10
0
8.2 nF
g1
2.4
0
0
1
1
9
1
g0
0
1
0
1
s
0
1
r2
0
0
0
0
1
1
1
1
6.8 nF
8
0
4.8
r1
Gain relative to maximum [dB]
0
0
1
1
0
0
1
1
al
7
Analog RC filter
r0
0
1
0
1
0
1
0
1
Filter Type
Digital filter
3.3 nF
ml
6
9.6
Reserved
Reserved
RSSI
-14
-20
-6
0
-103
5
1
-97
-91
-85
-79
-73
setth
1.5 nF
19.2
4
s
3
1
680 pF
38.4
f2
2
f1
1
270 pF
57.6
f0
0
150 pF
115.2
C22Ch
POR
100 pF
256
Si4421
19

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