SI4431-B1-FMR Silicon Laboratories Inc, SI4431-B1-FMR Datasheet - Page 58
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SI4431-B1-FMR
Manufacturer Part Number
SI4431-B1-FMR
Description
IC TXRX 240-930MHZ -8-13DB 20QFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4431-B1-FMR
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
13dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4431-B1-FMR
Manufacturer:
TE
Quantity:
2 000
Part Number:
SI4431-B1-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
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Si4430/31/32-B1
8.7. Low Duty Cycle Mode
The Low Duty Cycle Mode is available to automatically wake-up the receiver to check if a valid signal is available.
The basic operation of the low duty cycle mode is demonstrated in the figure below. If a valid preamble or sync
word is not detected the chip will return to sleep mode until the beginning of a new WUT period. If a valid preamble
and sync are detected the receiver on period will be extended for the low duty cycle mode duration (TLDC) to
receive all of the packet. The WUT period must be set in conjunction with the low duty cycle mode duration. The R
value (“Register 14h. Wake-up Timer Period 1”) is shared between the WUT and the TLDC. The ldc[7:0] bits are
located in “Register 19h. Low Duty Cycle Mode Duration.” The time of the TLDC is determined by the formula
below:
R
4
2
TLDC
ldc
7 [
:
] 0
ms
32
.
768
Figure 30. Low Duty Cycle Mode
58
Rev 1.1