CYRF7936-40LFXC Cypress Semiconductor Corp, CYRF7936-40LFXC Datasheet - Page 2

• Manufacturer Part Number: CYRF7936-40LFXC
• Description: IC CYFI TRANSCEIVER 40VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CyFi™r

Specifications of CYRF7936-40LFXC

• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: DSSS
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Interface Type: SPI
• Output Power: + 4 dBm
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Modulation: DSSS, GFSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Applications: -
• Sensitivity: -
• Memory Size: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2273

Document Number: 001-48013 Rev*A
Pinouts
The CYRF7936 CyFi™ Transceiver is a Radio IC designed for low power embedded wireless applications. Combined with
Cypress’s PSoC programmable system-on-chip and a CyFi network protocol stack, CYRF7936 can be used to implement a
complete CyFi wireless system.
Table 1. Pin Description - CYRF7936 40-Pin QFN
1
2, 4, 5, 9, 14, 15,
17, 18, 20, 21, 22,
23, 31, 32, 36, 39
3, 7, 16
6, 8, 38
10
11
12
13
19
24
25
26
27
28
29
30
33
Pin Number
XTAL
NC
V
V
RF
RF
GND
RF
RESV
SS#
SCK
IRQ
MOSI
MISO
XOUT
PACTL
V
CC
BAT(0-2)
IO
Name
BIAS
P
N
Type
GND
Pwr
Pwr
Pwr
NC
IO
IO
IO
IO
IO
IO
IO
O
I
I
I
I
RF
XTAL
V
V
V
BAT1
V
BAT2
Figure 1. Pin Diagram - CYRF7936 40-Pin QFN
NC
NC
NC
NC
BIAS
Corner
tabs
CC
CC
10
Default
1
2
3
4
5
6
7
8
9
O
O
O
O
Z
I
I
I
I
I
I
12 MHz crystal
Connect to GND
V
V
RF IO 1.8V reference voltage
Differential RF signal to and from antenna
Ground
Differential RF signal to and from antenna
Must be connected to GND
SPI enable, active LOW assertion. Enables and frames transfers.
SPI clock
Interrupt output (configurable active HIGH or LOW), or GPIO
SPI data input pin (Master Out Slave In), or SDAT
SPI data output pin (Master In Slave Out), or GPIO (in SPI 3-pin mode).
Tri-states when SPI 3PIN = 0 and SS# is deasserted.
Buffered 0.75, 1.5, 3, 6, or 12 MHz clock, PACTL, or GPIO.
Tri-states in sleep mode (configure as GPIO drive LOW).
Control signal for external PA, T/R switch, or GPIO
IO interface voltage, 1.8–3.6V
CC
BAT
CyFi Transciever
= 2.4V to 3.6V. Typically connected to V
40 lead QFN
= 1.8V to 3.6V. Main supply.
* E- PAD Bottom Side
CYRF7936
30
29
28
27
26
25
24
23
22
21
Description
NC
NC
SCK
SS
NC
IRQ / GPIO
XOUT / GPIO
MISO / GPIO
MOSI / SDAT
PACTL / GPIO
REG
.
CYRF7936
Page 2 of 21
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