SI4022-A0-FT Silicon Laboratories Inc, SI4022-A0-FT Datasheet
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SI4022-A0-FT
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SI4022-A0-FT Summary of contents
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... Si4022 Universal ISM Band FSK Transmitter DESCRIPTION Integration’s Si4022 is a single chip, low power, multi-channel FSK transmitter designed for use in applications requiring FCC or ETSI conformance for unlicensed use in the bands at 868 and 915 MHz. Used in conjunction with Integration’s FSK receivers flexible, low cost, and highly integrated solution that does not require production alignments ...
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... DETAILED FEATURE-LEVEL DESCRIPTION The Si4022 FSK transmitter is designed to cover the unlicensed frequency bands at 868, and 915 MHz. The device facilitates compliance with FCC and ETSI requirements. PLL The programmable PLL synthesizer determines the operating frequency, while preserving accuracy based on the on-chip crystal-controlled reference oscillator. The PLL’ ...
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... Reset output (active low) S Negative supply voltage (analog differential signal output (open collector differential signal output (open collector) S Negative supply voltage (bulk) S Positive supply voltage DI Data input for asynchronous modulation Si4022 FSK VDD VSS_B RF02 RF01 VSS_A nRES XTL / REF Description 3 ...
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... MHz band out max all blocks disabled crystal oscillator is ON programmable in 0.1 V steps 2.0 larger glithches on the V dd generate a POR even above the threshold V POR for proper POR generation 0.1 Si4022 Max Units 6 +0 1000 V o 125 C o 260 ...
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... Frequency error < 1kHz after 1 MHz step Initial calibration after power-up with running crystal oscillator Programmable in 0.5 pF steps, 8.5 tolerance +/- 10% After V has reached 90 final value Crystal ESR < 100 Ω Calibrated every 40 seconds 0.995 (Note 3) 1 Si4022 Typ Max Units 0.3 µA 1 µA 0 ...
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... Note 4: Note 4: The maximum FSK bitrate and the output phase noise are dependent on the PLL settings (with the Extended Features Command). Note 5: Note 5: Note 5: Note 5: Optimal antenna / admittance / inductance for the Si4022 Note 5: Note 6: Note 6: Note 6: Note 6: Note 6: With selective resonant antennas (see: Application Notes available from http://www.silabs.com/integration). ...
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... Spot Freq 1 MHz Spot Freq 1 MHz Spot Freq 1 MHz At 915 MHz L 10:34:57 May 5, 2005 Atten VBW 10 kHz Sweep 40.74 ms (2001 pts) Si4022 1.00000 MHz -101.95 dBc/Hz 10 MHz Value -101.95 dBc/Hz -107.05 dBc/Hz -109.98 dBc/Hz Mkr1 915.0020 MHz -14.09 dBm Span 2 MHz 7 ...
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... At 868 MHz with 180 kHz Deviation at 9.6 kbps 11:14:40 May 5, 2005 L Atten 10 dB VBW 10 kHz Sweep 40.74 ms (2001 pts) Antenna Tuning Characteristics 750–970 MHz Si4022 Span 2 MHz 8 ...
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... Data setup time (SDI transition to SCK rising edge Data hold time (SCK rising edge to SDI transition Data delay time OD Timing Diagram t SS nSEL SCK SDI BIT15 BIT14 SDO BIT15 BIT14 t OD BIT13 BIT8 BIT7 BIT13 BIT8 BIT7 Si4022 Minimum value [ns SHI t SH BIT1 BIT0 BIT1 BIT0 9 ...
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... The resulting output frequency can be calculated as out 0 where the channel center frequency (see the 0 next command the three bit binary number <m2 : m0> SIGN = (ms) XOR (FSK input POR 9082h Crystal Load x1 x0 Capacitance [ 10.0 … 15 16.0 – (- (20 kHz) SIGN Si4022 10 ...
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... Transmitter FIFO Write Command Bit With this command, the controller can write databits to the transmitter FIFO. Bit (fe) must be set in the FIFO Setting Command f10 The constant C is determined by the selected band as: Band [MHz] 868 915 POR Si4022 POR AD57h POR etr C002h etr ...
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... PA status N-2 N filling up FIFO N data bits xtal osc. stable sp * synthesizer on, PLL locked, PA ready to transmit NOTE: * See page 5 for the timing values time, to switch on. The actual value depends on sx startup time. Valid data can be transmitted only when the POR CE00h Si4022 12 ...
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... These bits can be used for further fine adjustment of the wake-up timer. The explanation of the bits can be found above elfc Clock Output Frequency [MHz wake- m13 m12 m11 m10 POR C813h POR C213h of the detector 1.25 1.66 2 2.5 3. POR E196h ms R POR m9 m8 C300h Si4022 13 ...
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... Wake-up timer overflow POR Power-on reset Status Register Read Sequence nSEL SCK SDI SDO FFIT FFEM FFOV LBD exlp ctls 0 dcal bw1 bw0 PLL bandwidth kHz kHz kHz 1 1 120 kHz WK-UP POR POR bw1 bw0 dsfi ewi B0CAh POR status out Si4022 14 ...
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... Bit dcal in the Extended Features Command (page 14) controls the automatic calibration feature reset power-on and the automatic calibration is enabled. This is necessary to compensate for process tolerances. After one calibration cycle further (re)calibration can be disabled by setting this bit slow < 0 slow x Si4022 clock periods are not to scale T fast + T from the slow fast ) half cycle. The ...
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... In order to get accurate values the AFC has to be disabled during the read by clearing the "en" bit in the AFC Control Command (bit 0). VDD L3 to RFP RFN C2 Si4022 50 Ohm load GND GND 16 ...
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... CRYSTAL SELECTION GUIDELINES The crystal oscillator of the Si4022 requires a 10 MHz parallel mode crystal. The circuit contains an integrated load capacitor in order to minimize the external component count. The internal load capacitance value is programmable from 8 0.5 pF steps. With appropriate PCB layout, the total load capacitance value can variety of crystal types can be used. ...
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... Data packet structure Data packet structure Data packet structure Data packet structure An example data packet structure using theSi4022 –Si4022 pair for data transmission. This packet structure is an example of how to use the high efficiency FIFO mode at the receiver side Prea mble The first 3 bytes compose a 24 bit length ‘01’ pattern to let enough time for the clock recovery of the receiver to lock. The next two bytes compose a 16 bit synchron pattern which is essential for the receiver’ ...
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... PACKAGE INFORMATION 16-pin TSSOP Si4022 19 ...
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... ORDERING INFORMATION Si4022 Universal ISM Band FSK Transmitter DESCRIPTION Si4022 16-pin TSSOP die Demo Boards and Development Kits DESCRIPTION ISM Chipset Development Kit Related Resources DESCRIPTION Antenna Selection Guide Antenna Development Guide IA4322 Universal ISM Band FSK Receiver Note: Volume orders must include chip revision to be accepted. ...