FSAM50SM60A Fairchild Semiconductor, FSAM50SM60A Datasheet - Page 13

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FSAM50SM60A

Manufacturer Part Number
FSAM50SM60A
Description
IC SMART PWR MODULE SPM32-CA
Manufacturer
Fairchild Semiconductor
Series
SPM™r
Type
IGBTr
Datasheet

Specifications of FSAM50SM60A

Configuration
3 Phase
Current
50A
Voltage
600V
Voltage - Isolation
2500Vrms
Package / Case
SPM32CA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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©2006 Fairchild Semiconductor Corporation
Note:
1) It would be recommended that by-pass capacitors for the gating input signals, IN
2) The logic input is compatible with standard CMOS or LSTTL outputs.
3) R
Note:
1) It would be recommended that the bootstrap diode, D
2) The bootstrap resistor (R
3) The ceramic capacitor placed between V
of high-side.
and on the both sides of CPU and SPM for the fault output signal, V
each of SPM pins.
PL
C
PL
/R
PH
CPU
C
These Values depend on PWM Control Algorithm
PH
470uF
/R
PF
C
15V-Line
PF
Fig. 13. Recommended Bootstrap Operation Circuit and Parameters
BS
coupling at each SPM input is recommended in order to prevent input/output signals’ oscillation and it should be as close as possible to
) should be 3 times greater than R
R
BS
Fig. 12. Recommended CPU I/O Interface Circuit
1nF
CC
-COM should be over 1μF and mounted as close to the pins of the SPM as possible.
100
100
100
47uF
1uF
D
Ω
Ω
Ω
BS
BS
, has soft and fast recovery characteristics.
4.7k
R
0.1uF
C
1nF
PF
E(H)
PF
=
Ω
=
. The recommended value of R
FO
, as close as possible.
0.47nF
C
R
PL
2k
(UL)
PL
=
Ω
=
, IN
5V-Line
(VL)
IN
COM
IN
COM
Vcc
Vcc
One-Leg Diagram of
, IN
FSAM50SM60A
OUT
4.7k
R
C
(WL)
HO
1.2nF
VB
VS
E(H)
PH
PH
, IN
=
=
Ω
R
is 5.6Ω, but it can be increased up to 20Ω for a slower dv/dt
(UH)
E(H)
, IN
(VH)
and IN
COM
IN
V
IN
FO
(UH)
(UL)
(WH)
,
,
P
N
IN
IN
should be placed on the SPM pins
Inverter
(VH)
(VL)
Output
SPM
,
,
IN
IN
(WH)
(WL)
May 4, 2006

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