MCP79410-I/SN Microchip Technology, MCP79410-I/SN Datasheet - Page 18

• Manufacturer Part Number: MCP79410-I/SN
• Description: IC RTC/CALENDER 8SOIC
• Manufacturer: Microchip Technology
• Type: Clock/Calendar/EEPROMr

Specifications of MCP79410-I/SN

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Memory Size: 1K (128 x 8)
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock/Calendar
• Rtc Memory Size: 64 B
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 400 uA
• Clock Format: HH
• Clock Ic Type: RTC
• Ic Interface Type: I2C
• Memory Configuration: 128 X 8
• Supply Voltage Range: 1.8V To 5.5V
• Digital Ic Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

MCP7941X
DS22266A-page 18
FIGURE 5-3:
FIGURE 5-4:
5.2.3
The EEPROM does not support a hardware write
protection pin, however, software block protection is
available to the use and is configured using the
STATUS register.
5.2.4
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read. The SRAM array can be read in
the same way as the EEPROM using the control byte
for the SRAM ‘1101111’ with a valid address.
5.2.4.1
The MCP7941X contains an address counter that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the
previous read access was to address n (n is any legal
address), the next current address read operation
would access data from address n + 1.
Upon receipt of the control byte with R/W bit set to one,
the MCP7941X issues an Acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer but does generate a Stop condition and the
MCP7941X discontinues transmission
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
Current Address Read
BLOCK PROTECTION
READ OPERATION
EE BYTE WRITE
EE PAGE WRITE
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S 1 0 1 0
CONTROL
BYTE
x = don’t care for 1K devices
x = don’t care for 1K devices
1 1 1
(Figure
S 1 0 1 0
S
T
A
R
T
0
A
C
K
CONTROL
5-1).
x
BYTE
ADDRESS
Preliminary
1 1 1
BYTE
0
A
C
K
x
ADDRESS
A
C
K
FIGURE 5-1:
5.2.4.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
MCP7941X as part of a write operation (R/W bit set to
‘0’). After the word address is sent, the master
generates a Start condition following the Acknowledge.
This terminates the write operation, but not before the
internal Address Pointer is set. Then, the master issues
the control byte again but with the R/W bit set to a one.
The MCP7941X will then issue an Acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer but it does generate a Stop
condition which causes the MCP7941X to discontinue
transmission
command, the internal address counter will point to the
address location following the one that was just read.
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
BYTE
DATA BYTE 0
Random Read
A
C
K
S
S
T
A
R
T
(Figure
1
A
C
K
CURRENT ADDRESS READ
(EEPROM SHOWN)
0
CONTROL
DATA
1
BYTE
0
5-2). After a random read
 2010 Microchip Technology Inc.
DATA BYTE 7
1 1 1
1
A
C
K
A
C
K
S
T
O
P
P
A
C
K
DATA
BYTE
S
T
O
P
P
O
N
A
C
K
S
T
O
P
P