SP809EK-L-2-9/TR Exar Corporation, SP809EK-L-2-9/TR Datasheet - Page 6

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SP809EK-L-2-9/TR

Manufacturer Part Number
SP809EK-L-2-9/TR
Description
IC MPU RESET CIRC 2.9V SOT23-3
Manufacturer
Exar Corporation
Type
Simple Reset/Power-On Resetr
Series
-r
Datasheet

Specifications of SP809EK-L-2-9/TR

Package / Case
TO-236-3, SC-59, SOT-23-3
Number Of Voltages Monitored
1
Output
Push-Pull, Totem Pole
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
2.9V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Internal Hysteresis
No
Operating Temperature Range
- 40 C to + 85 C
Output Type
Push-Pull
Manual Reset
No
Watchdog
No
Battery Backup Switching
No
Power-up Reset Delay (typ)
20 us
Supply Voltage (max)
6 V
Supply Voltage (min)
0.9 V
Supply Current (typ)
1 uA
Maximum Power Dissipation
320 mW
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SP809EK-L-2-9/TR
Manufacturer:
EXAR
Quantity:
5 000
Part Number:
SP809EK-L-2-9/TR
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
THEORY OF OPERATION
μP will be activated at a valid reset state.
These μP supervisory circuits assert reset to
prevent code execution errors during power-
up, power-down, or brownout conditions.
Reset is guaranteed to be a logic low for
V
threshold, an internal timer keeps RESET low
for the reset timeout period; after this interval,
RESET goes high.
If a brownout condition occurs (V
below the reset threshold), RESET goes low.
Any time V
the internal timer resets to zero, and RESET
goes low. The internal timer is activated after
APPLICATION INFORMATION
N
In addition to issuing a reset to the µP during
power-up,
conditions,
resistant to short-duration negative-going V
transient.
E
TO
When V
output no longer sinks current; it becomes an
open circuit. In this case, high-impedance
CMOS logic inputs connecting to RESET can
drift to undetermined voltages. Therefore,
SP809/810 with CMOS is perfect for most
applications of V
However in applications where RESET must be
valid down to 0V, adding a pull-down resistor
to RESET causes any leakage currents to flow
to ground, holding RESET low.
© 2011 Exar Corporation
TH
NSURING A
EGATIVE
>V
V
CC
CC
=0
>0.9V. Once V
CC
G
CC
falls below 0.9V, SP809 RESET
OING
V
SP809
power-down,
goes below the reset threshold,
ALID
CC
down to 0.9V.
V
CC
R
ESET
series
T
CC
RANSIENTS
exceeded the reset
O
UTPUT
and
are
D
brownout
relatively
CC
OWN
drops
CC
3
3
6/8
P
P
i
i
n
n
V
RESET remains low for the reset timeout
period.
B
T
SP809/810 with specified voltage as 5V±10%
or 3V±10% are ideal for systems using a
5V±5% or 3V±5% power supply. The reset is
guaranteed to assert after the power supply
falls below the minimum specified operating
voltage range of the system ICs. The pre-
trimmed thresholds are reducing the range
over which an undesirable reset may occur.
I
R
The RESET output on the SP809N is open
drain, this device interfaces easily with μPs
that have bidirectional reset pins. Connecting
the μP supervisor's RESET output directly to
the microcontroller's RESET pin with a single
pull-up resistor allows either device to assert
reset.
T
NTERFACING TO µ
CC
HRESHOLD
EST
ENEFIT OF
ESET
M
M
i
i
returns above the reset threshold, and
c
c
C
r
r
P
IRCUIT
o
o
INS
p
p
r
r
o
o
H
c
c
IGHLY
e
e
Fig. 10: Test Circuit
s
s
s
s
o
P
o
r
r
A
WITH
S
S
CCURATE
S
S
u
u
P
P
p
p
8
8
B
e
e
0
0
r
IDIRECTIONAL
r
v
v
9
9
i
i
R
s
s
/
/
o
o
ESET
r
r
S
S
Rev. 2.0.0
C
C
P
P
i
i
r
r
8
8
c
c
1
1
u
u
0
i
0
i
t
t

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