FDG1024NZ Fairchild Semiconductor, FDG1024NZ Datasheet - Page 2

• Manufacturer Part Number: FDG1024NZ
• Description: MOSFET N-CH DUAL 20V SC70-6
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDG1024NZ

• Fet Type: 2 N-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 175 mOhm @ 1.2A, 4.5V
• Drain To Source Voltage (vdss): 20V
• Current - Continuous Drain (id) @ 25° C: 1.2A
• Vgs(th) (max) @ Id: 1V @ 250µA
• Gate Charge (qg) @ Vgs: 2.6nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 150pF @ 10V
• Power - Max: 300mW
• Mounting Type: Surface Mount
• Package / Case: 6-TSSOP, SC-88, SOT-363
• Configuration: Dual
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 321 m Ohms
• Forward Transconductance Gfs (max / Min): 4 S
• Drain-source Breakdown Voltage: 20 V
• Continuous Drain Current: 1.2 A
• Power Dissipation: 0.36 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©2010 Fairchild Semiconductor Corporation
FDG1024NZ Rev.C
NOTES:
1. R
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
∆BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
I
V
t
Q
∆V
DSS
GSS
d(on)
r
d(off)
f
S
rr
DS(on)
the user's board design.
FS
GS(th)
SD
∆T
∆T
iss
oss
rss
g
g
gs
gd
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1 in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Parameter
a. 350 °C/W when mounted
2
T
on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
= 25 °C unless otherwise noted
2
pad of 2 oz copper.
V
V
V
I
V
f = 1 MHz
I
I
V
V
V
I
V
V
V
V
V
T
V
V
I
D
D
D
D
F
DD
GS
GS
J
DS
DS
GS
GS
GS
GS
GS
GS
GS
DD
GS
= 1.2 A
= 1.2 A, di/dt = 100 A/µs
= 250 µA, V
= 250 µA, referenced to 25 °C
= 250 µA, referenced to 25 °C
=125 °C
= 4.5 V, V
= 10 V, V
= 10 V, I
= 4.5 V, R
= 16 V, V
= 0 V, I
= ±8 V, V
= V
= 4.5 V, I
= 2.5 V, I
= 1.8 V, I
= 1.5 V, I
= 4.5 V, I
= 5 V, I
2
DS
Test Conditions
, I
S
D
D
D
= 0.3 A
GS
GS
DS
DD
D
D
D
D
D
= 1.2 A
GS
= 1.2 A,
GEN
= 250 µA
= 1.2 A
= 1.0 A
= 0.9 A
= 0.8 A
= 1.2 A,
= 0 V
= 0 V
= 0 V,
= 10 V,
= 0 V
= 6 Ω
b. 415 °C/W when mounted on a
minimum pad of 2 oz copper.
(Note 2)
θJC
is guaranteed by design while R
Min
0.4
20
Typ
160
185
232
321
220
115
0.8
4.6
3.7
1.7
1.5
1.8
0.3
0.4
0.7
1.9
14
25
20
10
-3
11
4
Max
±10
175
215
270
389
259
150
1.0
0.3
1.2
θJA
2.6
35
25
10
10
19
10
20
10
www.fairchildsemi.com
1
is determined by
mV/°C
mV/°C
Units
mΩ
µA
µA
pF
pF
pF
nC
nC
nC
nC
ns
ns
ns
ns
ns
V
Ω
V
S
A
V