XC3S250E-4TQ144I Xilinx Inc, XC3S250E-4TQ144I Datasheet - Page 117
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XC3S250E-4TQ144I
Manufacturer Part Number
XC3S250E-4TQ144I
Description
IC FPGA SPARTAN 3E 144TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S250E-4TQ144I
Number Of Logic Elements/cells
5508
Number Of Labs/clbs
612
Total Ram Bits
221184
Number Of I /o
108
Number Of Gates
250000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number:
XC3S250E-4TQ144I
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DS312-3 (v3.8) August 26, 2009
DC Electrical Characteristics
In this section, specifications may be designated as
Advance, Preliminary, or Production. These terms are
defined as follows:
Advance: Initial estimates are based on simulation, early
characterization, and/or extrapolation from the characteris-
tics of other families. Values are subject to change. Use as
estimates, not for production.
Preliminary: Based on characterization. Further changes
are not expected.
Production: These specifications are approved once the
silicon has been characterized over numerous production
lots. Parameter values are considered stable with no future
changes expected.
Table 73: Absolute Maximum Ratings
© 2005–2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other coun-
tries. All other trademarks are the property of their respective owners.
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
4.
5.
V
Symbol
V
V
IN
V
V
V
T
CCAUX
CCINT
(1,2,3,4)
Each of the User I/O and Dual-Purpose pins is associated with one of the four banks’ V
associated V
evaluate the maximum V
Input voltages outside the -0.5V to V
diode rating is met and no more than 100 pins exceed the range simultaneously. Prolonged exposure to such current may compromise
device reliability. A sustained current of 10 mA will not compromise device reliability.
Interfacing Large-Swing Single-Ended Signals to User I/O Pins on Spartan-3 Generation FPGAs for more details.
All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) draw power from the V
that the internal diode junctions that exist between each of these pins and the V
range used to evaluate the maximum V
See XAPP459, "Eliminating I/O Coupling Effects when Interfacing Large-Swing Single-Ended Signals to User I/O Pins."
For soldering guidelines, see UG112: Device Packaging and Thermal Characteristics and XAPP427: Implementation and Solder Reflow
Guidelines for Pb-Free Packages.
CCO
I
ESD
T
STG
REF
IK
J
Internal supply voltage
Auxiliary supply voltage
Output driver supply voltage
Input reference voltage
Voltage applied to all User I/O pins and
Dual-Purpose pins
Voltage applied to all Dedicated pins
Input clamp current per I/O pin
Electrostatic Discharge Voltage
Junction temperature
Storage temperature
CCO
rails or ground rail ensures that the internal diode junctions do not turn on.
IN
Description
voltage.
R
CCO
IN
+ 0.5V (or V
voltage. As long as the V
CCAUX
162
Human body model
Driver in a
high-impedance
state
–0.5 V < V
Charged device model
Machine model
www.xilinx.com
+ 0.5V) voltage range are permissible provided that the I
0
IN
IN
Spartan-3E FPGA Family:
DC and Switching
Characteristics
Product Specification
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. Unless other-
wise noted, the published parameter values apply to all
Spartan®-3E devices. AC and DC characteristics are
specified using the same numbers for both commercial
and industrial grades.
Absolute Maximum Ratings
Stresses beyond those listed under
Maximum Ratings may cause permanent damage to the
device. These are stress ratings only; functional operation
of the device at these or any other conditions beyond those
listed under the Recommended Operating Conditions is not
implied. Exposure to absolute maximum conditions for
extended periods of time adversely affects device reliability.
max specification is met, oxide stress is not possible.
Conditions
< (V
CCO
Commercial
Industrial
All temp. ranges
CCAUX
+ 0.5 V)
See
CCAUX
rail do not turn on.
CCO
XAPP459, Eliminating I/O Coupling Effects when
rails. Keeping V
Table 77
rail (2.5V). Meeting the V
–0.95
–0.85
–0.5
–0.5
–0.5
–0.5
–0.5
Min
–65
specifies the V
–
–
–
–
–
Table 77
IN
within 500 mV of the
V
V
CCAUX
CCO
specifies the V
±
Table
±
±
±
CCO
Max
1.32
3.00
3.75
IK
125
150
4.4
4.3
2000
IN
100
500
200
+ 0.5
input diode clamp
+ 0.5
max limit ensures
range used to
73: Absolute
(1)
(3)
CCAUX
Units
mA
°C
°C
V
V
V
V
V
V
V
V
V
V
117
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