AT89LP52-20AU Atmel, AT89LP52-20AU Datasheet - Page 12

• Manufacturer Part Number: AT89LP52-20AU
• Description: IC MCU 8051 8K FLASH SPI 44TQFP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP52-20AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

3.1.2
3.2
12
Internal Data Memory
AT89LP51/52 - Preliminary
SIG
In order for Fast mode to fetch externally, two wait states must be inserted for every clock cycle,
increasing the instruction execution time by a factor of 3. However, due to other optimizations,
external Fast mode instructions may still be 1/4 to 1/2 faster than their Compatibility mode equiv-
alents. Note that if ALE is allowed to toggle in Fast mode, there is a possibility that when the
CPU jumps from internal to external execution a short pulse may occur on ALE as shown in
ure
this behavior can be avoided by setting the DISALE bit prior to any jump above the 8K border.
Figure 3-4.
In addition to the 64K code space, the AT89LP51/52 also supports a 256-byte User Signature
Array and a 128-byte Atmel Signature Array that are accessible by the CPU. The Atmel Signa-
ture Array is initialized with the Device ID in the factory. The User Signature Array is available for
user identification codes or constant parameter data. Data stored in the signature array is not
secure. Security bits will disable writes to the array; however, reads by an external device pro-
grammer are always allowed.
In order to read from the signature arrays, the SIGEN bit (AUXR1.3) must be set (See
on page
User Signature Array is mapped from addresses 0100h to 01FFh and the Atmel Signature Array
is mapped from addresses 0000h to 007Fh. SIGEN must be cleared before using MOVC to
access the code memory. The User Signature Array may also be modified by the In-Application
Programming interface. When IAP = 1 and SIGEN = 1, MOVX @DPTR instructions will access
the array (See
The AT89LP51/52 contains 256 bytes of general SRAM data memory plus 128 bytes of I/O
memory mapped into a single 8-bit address space. Access to the internal data memory does not
require any configuration. The internal data memory has three address spaces: DATA, IDATA
and SFR; as shown in
internally. See
3-4. The setup time from the address to the falling edge of ALE remains the same. However,
DISALE=0
DISALE=1
PSEN
27). While SIGEN is one, MOVC A,@A+DPTR will access the signature arrays. The
CLK
ALE
ALE
P0
P2
Internal/External Program Memory Boundary (Fast Mode)
Section 3.4 on page
“External Data Memory”
Figure
INTERNAL EXECUTION
P0 SFR OUT
P2 SFR OUT
3-5. Some portions of external data memory are also implemented
22).
below for more information.
PCL OUT
SHORT
PULSE
PCH OUT
FLOAT
EXTERNAL EXECUTION
DATA
SAMPLED
PCL OUT
PCH OUT
3709B–MICRO–12/10
Table 5-3
Fig-