ATMEGA164PA-MN Atmel, ATMEGA164PA-MN Datasheet

no-image

ATMEGA164PA-MN

Manufacturer Part Number
ATMEGA164PA-MN
Description
IC MCU AVR 16K FLASH 20MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA164PA-MN

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
Note:
High-performance, Low-power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades for ATmega164PA/324PA/644PA/1284P
Power Consumption at 1 MHz, 1.8V, 25°C
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 16/32/64/128K Bytes of In-System Self-programmable Flash program memory
– 512B/1K/2K/4K Bytes EEPROM (ATmega164PA/324PA/644PA/1284P)
– 1/2/4/16K Bytes Internal SRAM (ATmega164PA/324PA/644PA/1284P)
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel, 10-bit ADC
– Byte-oriented Two-wire Serial Interface
– Two Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF
– 44-pad DRQFN
– 49-ball VFBGA
– 1.8 - 5.5V
– 0 - 20MHz @ 1.8 - 5.5V
– Active: 0.4 mA
– Power-down Mode: 0.1µA
– Power-save Mode: 0.6µA (Including 32 kHz RTC)
(ATmega164PA/324PA/644PA/1284P)
Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Differential mode with selectable gain at 1x, 10x or 200x
1. See
”Data Retention” on page 9
®
8-bit Microcontroller
for details.
(1)
8-bit
Microcontroller
with
16/32/64/128K
Bytes In-System
Programmable
Flash
ATmega164PA
ATmega324PA
ATmega644PA
ATmega1284P
Summary
Rev. 8152GS–AVR–11/09

Related parts for ATMEGA164PA-MN

ATMEGA164PA-MN Summary of contents

Page 1

... Bytes of In-System Self-programmable Flash program memory (ATmega164PA/324PA/644PA/1284P) – 512B/1K/2K/4K Bytes EEPROM (ATmega164PA/324PA/644PA/1284P) – 1/2/4/16K Bytes Internal SRAM (ATmega164PA/324PA/644PA/1284P) – Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM – Data retention: 20 years at 85°C/ 100 years at 25°C – Optional Boot Code Section with Independent Lock Bits ...

Page 2

... Pin Configurations 1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF for ATmega164PA/324PA/644PA/1284P Figure 1-1. Note: 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Pinout (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10/INT2/AIN0) PB2 (PCINT11/OC0A/AIN1) PB3 (PCINT12/OC0B/SS) PB4 (PCINT13/MOSI) PB5 (PCINT14/MISO) PB6 (PCINT15/SCK) PB7 RESET VCC GND XTAL2 XTAL1 (PCINT24/RXD0) PD0 (PCINT25/TXD0) PD1 (PCINT26/RXD1/INT0) PD2 ...

Page 3

... Pinout - DRQFN for ATmega164PA/324PA/644PA Figure 1- Table 1- 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P DRQFN - Pinout Top view B1 B15 B2 B14 B3 B13 B4 B12 B5 B11 DRQFN - Pinout PB5 A7 PD3 PB6 B6 PD4 PB7 A8 PD5 RESET B7 PD6 VCC A9 PD7 GND B8 VCC XTAL2 A10 GND XTAL1 B9 PC0 PD0 A11 ...

Page 4

... Pinout - VFBGA for ATmega164PA/324PA/644PA Figure 1- Table 1- 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P VFBGA - Pinout Top view BGA - Pinout GND PB4 PB2 PB6 PB5 PB3 VCC RESET PB7 GND XTAL2 PD0 XTAL1 PD1 PD5 PD2 PD3 PD6 GND PD4 VCC Bottom view GND ...

Page 5

... Overview The ATmega164PA/324PA/644PA/1284P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega164PA/324PA/644PA/1284P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...

Page 6

... RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega164PA/324PA/644PA/1284P is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega164PA/324PA/644PA/1284P AVR is supported with a full suite of program and sys debugger/simulators, in-circuit emulators, and evaluation kits. ...

Page 7

... Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running ATmega164PA/324PA/644PA/1284P as listed on 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P page 81. ...

Page 8

... through a low-pass filter. CC 2.3.11 AREF This is the analog reference pin for the Analog-to-digital Converter. 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P 330. Shorter pulses are not guaranteed to generate a reset. , even if the ADC is not used. If the ADC is used, it should be connected CC ”System and Reset 8 ...

Page 9

... I/O. Typically "LDS" and "STS" combined with "SBRS", "SBRC", "SBR", and "CBR". Note: 5. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P 1. 9 ...

Page 10

... UDR1 (0xCD) UBRR1H - (0xCC) UBRR1L (0xCB) Reserved - (0xCA) UCSR1C UMSEL11 (0xC9) UCSR1B RXCIE1 (0xC8) UCSR1A RXC1 (0xC7) Reserved - (0xC6) UDR0 (0xC5) UBRR0H - (0xC4) UBRR0L (0xC3) Reserved - (0xC2) UCSR0C UMSEL01 (0xC1) UCSR0B RXCIE0 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Bit 6 Bit 5 Bit 4 Bit ...

Page 11

... ICR1H (0x86) ICR1L (0x85) TCNT1H (0x84) TCNT1L (0x83) Reserved - (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 (0x7F) DIDR1 - 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Bit 6 Bit 5 Bit 4 Bit 3 TXC0 UDRE0 FE0 DOR0 - - - - - - TWAM5 TWAM4 TWAM3 TWAM2 TWEA TWSTA TWSTO TWWC 2-wire Serial Interface Data Register ...

Page 12

... COM0A1 0x23 (0x43) GTCCR TSM 0x22 (0x42) EEARH - 0x21 (0x41) EEARL 0x20 (0x40) EEDR 0x1F (0x3F) EECR - 0x1E (0x3E) GPIOR0 0x1D (0x3D) EIMSK - 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Bit 6 Bit 5 Bit 4 Bit 3 ADC6D ADC5D ADC4D ADC3D - - - REFS0 ADLAR MUX4 MUX3 ACME - - ADSC ...

Page 13

... LD and ST instructions, $20 must be added to these addresses. The ATmega164PA/324PA/644PA/1284P is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from $60 - $FF, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 8152GS– ...

Page 14

... Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← Rd • ← ...

Page 15

... Load Program Memory and Post-Inc SPM Store Program Memory IN Rd Port OUT P, Rr Out Port 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Description then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← Rd(n+1), Rd(7) ← 0 Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7) Rd(7)← ...

Page 16

... Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Description STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only Operation Flags #Clocks None ...

Page 17

... Staggered 1.0 mm body, 2.60 x 2.60 mm Exposed Pad, Quad Flat No-Lead Package (QFN) 49C2 49-ball Array) 0.65 mm Pitch mm, Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA) 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P (2) Ordering Code Package ATmega164PA-AU 44A ATmega164PA-PU 40P6 ATmega164PA-MU 44M1 (4) ATmega164PA-MCH 44MC ATmega164PA-CU 49C2 328. Package Type (1) Operational Range Industrial ...

Page 18

... Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) 44MC 44-lead (2-row Staggered 1.0 mm body, 2.60 x 2.60 mm Exposed Pad, Quad Flat No-Lead Package (QFN) 49C2 49-ball Array) 0.65 mm Pitch mm, Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA) 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P (2) Ordering Code Package ATmega324PA-AU 44A ...

Page 19

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 40P6 40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad 1.0 mm body, lead pitch 0.50 mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P (2) Ordering Code Package ATmega644PA-AU 44A ...

Page 20

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 40P6 40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P Ordering Code Package (2) ATmega1284P-AU 44A ...

Page 21

... This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P B PIN 1 IDENTIFIER TITLE 44A, 44-lead Body Size, 1 ...

Page 22

... C Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P D PIN 0º ~ 15º REF eB TITLE 40P6, 40-lead (0.600" ...

Page 23

... D Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. Package Drawing Contact: packagedrawings@atmel.com 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P E Pin #1 Corner Pin #1 Option A 1 Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 44M1, 44-pad 1.0 mm Body, Lead Pitch 0 ...

Page 24

... Pin A19 B16 eR A18 B15 D2 B11 A13 B10 A12 L BOTTOM VIEW 1. The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P E TOP VIEW eT/2 A24 B20 0.40 R0. TITLE 44MC, 44QFN (2-Row Staggered 1.00 mm Body, 2.60 x 2.60 mm Exposed Pad, Quad Flat No Lead Package ...

Page 25

... A1 BALL BALL CORNER b Package Drawing Contact: packagedrawings@atmel.com 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P E D TOP VIEW 0.35 ± 0.05 Ø e BOTTOM VIEW TITLE 49C2, 49-ball ( Array), 0.65 mm Pitch, 5.0 x 5.0 x 1.0 mm, Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA) 0. SIDE VIEW ...

Page 26

... Errata 10.1 ATmega164PA Rev known Errata. 10.2 ATmega324PA Rev known Errata. 10.3 ATmega644PA Rev known Errata. 8152GS–AVR–11/09 ATmega164PA/324PA/644PA/1284P 26 ...

Page 27

... Programming Pin Mapping” on page Updated ”Register Summary” on page 415, Updated ”Instruction Set Summary” on page 419, Updated ATmega164PA/324PA ”Ordering Information” on page Updated ”Ordering Information” for ATmega644PA device on page 424. Updated ”ATmega644PA Typical Characteristics” on page 390 56 ...

Page 28

... ATmega644PA device and updated the whole datasheet accordingly. Updated ”Overview” on page 5. Inserted ”Comparison Between ATmega164PA, and ATmega324PA” on page Updated all resgister description in ”AVR CPU Core” on page Updated “AVR Memories” section included all register description. Updated ” ...

Page 29

Rev. 8152A- 11/ Initial revision (Based on the ATmega164P/324P/644P datasheet 8011K-AVR-09/08). Changes done compared to ATmega164P/324P/644P datasheet 8011K-AVR-09/08: –New graphics in ”Typical Characteristics” on page 337 –New ”Ordering Information” on page 395 ...

Page 30

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords