SST89E516RD-40-C-PIE Microchip Technology, SST89E516RD-40-C-PIE Datasheet
SST89E516RD-40-C-PIE
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SST89E516RD-40-C-PIE Summary of contents
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... Full-Duplex, Enhanced UART – Framing Error Detection – Automatic Address Recognition PRODUCT DESCRIPTION The SST89E516RDx and SST89V516RDx are members of the FlashFlex family of 8-bit microcontroller products designed and manufactured with SST’s patented and pro- prietary SuperFlash CMOS semiconductor process tech- nology. The split-gate cell design and thick-oxide tunneling injector offer significant cost and reliability benefits for SST’ ...
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... Full-Duplex, Enhanced UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.2 Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 7.0 WATCHDOG TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 8.0 PROGRAMMABLE COUNTER ARRAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 8.1 PCA Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 8.2 PCA Timer/Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 8.3 Compare/Capture Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 9.0 SECURITY LOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.1 Hard Lock ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 2 FlashFlex MCU S71273-03-000 1/07 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 9.2 SoftLock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.3 Security Lock Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 9.4 Read Operation Under Lock Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 10.0 RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 10.1 Power-on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 10.2 Software Reset 10.3 Brown-out Detection Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 11.0 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 11.1 Interrupt Priority and Polling Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 12.0 POWER-SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 12 ...
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... FIGURE 13-1: Oscillator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 FIGURE 14-1: I vs. Frequency for 3V SST89V516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 DD FIGURE 14-2: I vs. Frequency for 5V SST89E516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 DD FIGURE 14-3: External Program Memory Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 FIGURE 14-4: External Data Memory Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 FIGURE 14-5: External Data Memory Write Cycle FIGURE 14-6: External Clock Drive Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 FIGURE 14-7: Shift Register Mode Timing Waveforms ...
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... TABLE 14-3: AC Conditions of Test TABLE 14-4: Recommended System Power-up Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 TABLE 14-5: Pin Impedance (VDD=3.3V, TA=25°C, f=1 Mhz, other pins open TABLE 14-6: DC Electrical Characteristics for SST89E516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 TABLE 14-7: DC Electrical Characteristics for SST89V516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 TABLE 14-8: AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 TABLE 14-9: External Clock Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 TABLE 14-10: Serial Port Timing ...
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... Block 64K x8 Secondary Block 8K x8 Timer 0 (16-bit) Timer 1 (16-bit) Timer 2 (16-bit) FIGURE 1-1: Functional Block Diagram ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 8051 CPU Core ALU, ACC, B-Register, Instruction Register, Program Counter, Timing and Control Flash Control Unit ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 2.0 PIN ASSIGNMENTS (CEX2 / MOSI) P1.5 (CEX3 / MISO) P1.6 (CEX4 / SCK) P1.7 RST (RXD) P3.0 (TXD) P3.1 (INT0#) P3.2 (INT1#) P3.3 (T0) P3.4 (T1) P3.5 FIGURE 2-1: Pin Assignments for 40-Contact WQFN ©2007 Silicon Storage Technology, Inc. ...
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... RST 4 5 44-lead TQFP 6 Top View FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD V DD P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA# ALE/PROG# PSEN# P2.7 (A15) P2.6 (A14) P2.5 (A13) P2.4 (A12) P2.3 (A11) P2 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD (CEX2 / MOSI) P1.5 (CEX3 / MISO) P1.6 (CEX4 / SCK) P1.7 RST (RXD) P3.0 INT2#/P4.3 (TXD) P3.1 (INT0#) P3.2 (INT1#) P3.3 (T0) P3.4 (T1) P3.5 FIGURE 2-4: Pin Assignments for 44-lead PLCC ©2007 Silicon Storage Technology, Inc 44-lead PLCC ...
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... P3[2] I INT0#: External Interrupt 0 Input ©2007 Silicon Storage Technology, Inc. Port 0 also receives the code bytes during the external host OH. . Port 2 also receives some control signals and high-order address bits during the exter- 10 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD S71273-03-000 1/07 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 2-1: Pin Descriptions (Continued Symbol Type Name and Functions P3[3] I INT1#: External Interrupt 1 Input P3[4] I T0: External count input to Timer/Counter 0 P3[5] I T1: External count input to Timer/Counter 1 P3[6] O WR#: External Data Memory Write strobe P3[7] ...
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... When the PC falls within 0000H - 1FFFH, the instruction will be fetched from Block 1 instead of Block 0. Outside of 0000H - 1FFFH, Block 0 is used. Locations 0000H - 1FFFH of Block 0 are reachable through in-application programming. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD selection. Please refer to Figure 3-1 for the program mem- ory configuration. Program bank selection is described in the next section ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 3.2.1 Reset Configuration of Program Memory Block Switching Program memory block switching is initialized after reset according to the state of the Start-up Configuration bit SC0. The SC0 bit is programmed via an external host mode command or an IAP Mode command. See Table 4-3. ...
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... EXTRAM = 1 RD# / WR# asserted 1. Access limited to ERAM address within 0 to 0FFH; cannot access 100H to 02FFH. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD address bits. This provides external paging capabilities. Using MOVX @DPTR generates a 16-bit address. This allows external addressing up the 64K. Port 2 provides the high-order eight address bits (DPH), and Port 0 multiplexes the low order eight address bits (DPL) with data ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 2FFH Expanded RAM 768 Bytes (Indirect Addressing) 000H 2FFH Expanded RAM 000H FIGURE 3-2: Internal and External Data Memory Structure ©2007 Silicon Storage Technology, Inc. FFH FFH (Indirect Addressing) Upper 128 Bytes Internal RAM 80H ...
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... A0H P2 1 98H SCON SBUF 1 90H P1 1 88H TCON TMOD 1 80H Bit addressable SFRs ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD DPTR1 DPTR0 DPL DPH 82H 83H 8 BYTES CCAP0H CCAP1H CCAP2H CCAP0L CCAP1L CCAP2L CCAPM0 CCAPM1 CCAPM2 RCAP2L RCAP2H ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 3-5: CPU related SFRs Direct Symbol Description Address 1 ACC Accumulator E0H Register F0H 1 PSW Program Status D0H Word SP Stack Pointer 81H DPL Data Pointer 82H Low DPH Data Pointer 83H High 1 IE Interrupt Enable ...
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... Timer 2 LSB CCH RCAP2H Timer 2 CBH Capture MSB RCAP2L Timer 2 CAH Capture LSB 1. Bit Addressable SFRs ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Bit Address, Symbol, or Alternative Port Function MSB - - - WDOUT WDRE Watchdog Timer Data/Reload Bit Address, Symbol, or Alternative Port Function ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 3-9: Interface SFRs Direct Symbol Description Address SBUF Serial Data Buffer 99H 1 SCON Serial Port Control 98H SADDR Slave Address A9H SADEN Slave Address B9H Mask SPCR SPI Control D5H Register SPSR SPI Status ...
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... CCAPM0 PCA DAH Compare/Capture CCAPM1 DBH Module Mode CCAPM2 DCH Registers CCAPM3 DDH CCAPM4 DEH 1. Bit Addressable SFRs ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Bit Address, Symbol, or Alternative Port Function MSB CH[7:0] CL[7: CCF4 CCF3 CCF2 CIDL WDTE - - ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SuperFlash Configuration Register (SFCF) Location 7 6 B1H - IAPEN Symbol Function IAPEN Enable IAP operation 0: IAP commands are disabled 1: IAP commands are enabled SWR Software Reset See Section 10.2, “Software Reset” BSEL Program memory block switching bit ...
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... FLASH_BUSY Flash operation completion polling bit. 0: Device has fully completed the last IAP command. 1: Device is busy with flash operation. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SuperFlash Data Register ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Interrupt Enable (IE) Location 7 6 A8H EA EC Symbol Function EA Global Interrupt Enable Disable 1 = Enable EC PCA Interrupt Enable. ET2 Timer 2 Interrupt Enable. ES Serial Interrupt Enable. ET1 Timer 1 Interrupt Enable. EX1 External 1 Interrupt Enable. ET0 Timer 0 Interrupt Enable. ...
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... Interrupt Priority 1 High (IP1H) Location 7 6 F7H 1 - Symbol Function PBOH Brown-out Interrupt priority bit high PX2H External Interrupt 2 priority bit high PX3H External Interrupt 3 priority bit high ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD PT2 PS PT1 PX1 PT2H PSH PT1H PX1H ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Auxiliary Register (AUXR) Location 7 6 8EH - - Symbol Function EXTRAM Internal/External RAM access 0: Internal Expanded RAM access within range of 00H to 2FFH using MOVX @Ri / @DPTR. Beyond 300H, the MCU always accesses external data memory. For details, refer to Section 3.4, “Expanded Data RAM Addressing” . ...
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... Must be cleared by software. CCF1 PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software. CCF0 PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Watchdog Timer Data/Reload 1 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD PCA Timer/Counter Mode Register Location 7 6 D9H CIDL WDTE 1. Not bit addressable Symbol Function CIDL Counter Idle Control: 0: Programs the PCA Counter to continue functioning during idle mode 1: Programs the PCA Counter to be gated off during idle ...
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... Enables CEXn pin to be used as a pulse width modulated output ECCFn Enable CCF Interrupt 0: Disables compare/capture flag CCF[4:0] in the CCON register to generate an interrupt request. 1: Enables compare/capture flag CCF[4:0] in the CCON register to generate an interrupt request. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 1 (CCAPMn CAPP0 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SPI Control Register (SPCR) Location 7 6 D5H SPIE SPE Symbol Function SPIE If both SPIE and ES are set to one, SPI interrupts are enabled. SPE SPI enable bit. 0: Disables SPI. 1: Enables SPI and connects SS#, MOSI, MISO, and SCK to pins P1.4, P1.5, P1.6, P1.7. ...
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... Power-down bit, this bit is cleared by hardware after exiting from power-down mode. 0: Power-down mode is not activated. 1: Activates Power-down mode. IDL Idle mode bit, this bit is cleared by hardware after exiting from idle mode. 0: Idle mode is not activated. 1: Activates idle mode. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SPDR[7: ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Serial Port Control Register (SCON) Location 7 6 98H SM0/FE SM1 Symbol Function FE Set SMOD0 = 1 to access FE bit framing error 1: Framing Error. Set by receiver when an invalid stop bit is detected. This bit needs to be cleared by software. SM0 SMOD0 = 0 to access SM0 bit ...
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... Note: User should not write ‘1’s to reserved bits. The value read from a reserved bit is indeterminate. T2OE Timer 2 Output Enable bit. DCEN Down Count Enable bit. When set, this allows Timer configured as an up/down counter. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD RCLK TCLK ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD External Interrupt Control (XICON) Location 7 6 AEH - EX3 Symbol Function EX2 External Interrupt 2 Enable bit if set IE2 Interrupt Enable If IT2=1, IE2 is set/cleared automatically by hardware when interrupt is detected/ serviced. IT2 External Interrupt 2 is falling-edge/low-level triggered when this bit is cleared by software ...
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... IAP Enable Bit The IAP enable bit, SFCF[6], enables in-application pro- gramming mode. Until this bit is set, all flash programming IAP commands will be ignored. 34 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD S71273-03-000 1/07 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 4-2: IAP Address Resolution EA# SFCF[1: 01, 10 01, 10 01, 10 operation is performed because code from one block may not program the same originating block 4.2.4 In-Application Programming Mode Commands All of the following commands can only be initiated in the IAP mode ...
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... MOV SFCM, #0EH 1273 F06.0 SFST[2] indicates operation completion Interrupt scheme INT1 interrupt 1273 F07.0 36 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD IAP Enable ORL SFCF, #40H Program byte address MOV SFAH, #byte_addressH MOV SFAL, #byte_addressL Move data to SFDT MOV SFDT, #data ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 4.2.4.5 Byte-Verify The Byte-Verify command allows the user to verify that the device has correctly performed an Erase or Program com- mand. Byte-Verify command returns the data byte in SFDT if the command is successful. The user is required to check that the previous flash operation has fully completed before issuing a Byte-Verify ...
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... Instruction must be located in Block 1 or external code memory. Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands externally pulled low when reset. ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 4.2.6 Interrupt Termination If interrupt termination is selected, (SFCM[7] is set), then an interrupt (INT1) will be generated to indicate flash opera- tion completion ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 5.0 TIMERS/COUNTERS 5.1 Timers The device has three 16-bit registers that can be used as either timers or event counters. The three timers/counters are denoted Timer 0 (T0), Timer 1 (T1), and Timer 2 (T2). Each is designated a pair of 8-bit registers in the SFRs. ...
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... SM2 REN TB8 RB8 TI Set FE bit if stop bit is 0 (framing error) (SMOD0 = 1) SM0 to UART mode control (SMOD0 = 0) BOF POF GF1 GF0 PD To UART framing error control 40 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SCON RI (98H) PCON IDL (87H) 1273 F13.0 S71273-03-000 1/07 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD RXD D0 Start bit RI SMOD0=X FE SMOD0=1 FIGURE 6-2: UART Timings in Mode 1 RXD D0 Start bit RI SMOD0=0 RI SMOD0=1 FE SMOD0=1 FIGURE 6-3: UART Timings in Modes 2 and 3 ©2007 Silicon Storage Technology, Inc Data byte Data byte 41 Data Sheet D7 Stop bit 1273 F14 ...
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... SADDR. See the example below: Slave 1 SADDR = 1111 0001 SADEN = 1111 1010 GIVEN = 1111 0X0X ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Slave 2 SADDR = 1111 0011 SADEN = 1111 1001 GIVEN = 1111 0XX1 6.1.2.1 Using the Given Address to Select Slaves Any bits masked off from SADEN become a “ ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Select Slave 3 Only Slave 2 Given Address Possible Addresses 1111 X0X1 The user could use the possible addresses above to select slave 3 only. Another combination could be to select slave 2 and 3 only as shown below. Select Slaves 2 & 3 Only Slaves 2 & ...
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... SS# (to Slave) FIGURE 1: SPI Transfer Format with CPHA = 0 SCK Cycle # 1 (for reference) SCK (CPOL=0) SCK (CPOL=1) MOSI MSB (from Master) MISO MSB (from Slave) SS# (to Slave) FIGURE 6-5: SPI Transfer Format with CPHA = 1 ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 7.0 WATCHDOG TIMER The device offers a programmable Watchdog Timer (WDT) for fail safe protection against software deadlock and auto- matic recovery. To protect the system against software deadlock, the user software must refresh the WDT within a user-defined time period ...
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... PCA Timer/Counter FIGURE 8-1: PCA Timer/Counter and Compare/Capture Modules ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD PCA. External events associated with modules are shared with corresponding Port 1 pins. Modules not using the port pins can still be used for standard I/O. ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD The table below summarizes various clock inputs at two common frequencies. TABLE 8-2: PCA Timer/Counter Inputs PCA Timer/Counter Mode Mode 0: f /12 OSC Mode 1: 1 Mode 2: Timer 0 Overflows Timer 0 programmed in: 8-bit mode 16-bit mode 8-bit auto-reload Mode 3: External Input MAX 1 ...
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... Compare/Capture CCAP4L EEH Registers ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) deter- mine whether the capture input will be active on a positive edge or negative edge. The CAPN bit enables the negative edge that a capture input will be active on, and the CAPP bit enables the positive edge ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 8-5: PCA Module Modes Without Interrupt enabled ECOMy CAPPy CAPNy MATy - User should not write ‘1’s to reserved bits. The value read from a reserved bit is indeterminate disables toggle function enables toggle function on CEX[4:0] pin. ...
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... FIGURE 8-2: PCA Capture Mode ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD and CL) into the module’s capture registers (CCAPnL and CCAPnH). If the CCFn bit for the module in the CCON SFR and the ECCFn bit in the CCAPMn SFR are set, then an interrupt will be generated ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 8.3.2 16-Bit Software Timer Mode The 16-bit software timer mode is used to trigger interrupt routines, which must occur at periodic intervals setup by setting both the ECOM and MAT bits in the module’s CCAPMn register. The PCA timer will be compared to the module’ ...
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... PCA timer rolls over and matches the last compare value. (See Figure 8- CCF4 CCF3 CCAPnL Match 16-bit Comparator CH CL ECOMn CAPPn CAPNn MATn FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD CCON CCF2 CCF1 CCF0 PCA Interrupt Toggle CCAPMn TOGn PWMn ECCFn n 1273 F23.0 S71273-03-000 CEXn ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 8.3.4 Pulse Width Modulator The Pulse Width Modulator (PWM) mode is used to gener- ate 8-bit PWMs by comparing the low byte of the PCA timer (CL) with the low byte of the compare register (CCAPnL). When CL < CCAPnL the output is low. When CL ≥ ...
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... Enable Match 16-bit Comparator CH CL PCA Timer/Counter ECOMn CAPPn CAPNn MATn TOGn FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD ; to FFFF Hex, these compare ; values must be changed. ; watchdog timer without ; changing the other bits in ; CMOD ; current PCA CMOD CPS0 ECF Reset CCAPM4 PWMn ECCFn ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 9.0 SECURITY LOCK The security lock protects against software piracy and pre- vents the contents of the flash from being read by unautho- rized parties. It also protects against code corruption resulting from accidental erasing and programming to the internal flash memory ...
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... Hard Lock Hard Lock 56 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Security Type No Security Features are Enabled. MOVC instructions executed from external program memory are dis- abled from fetching code bytes from internal memory, EA# is sampled and latched on Reset, and further pro- gramming of the flash is disabled ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 9-2: Security Lock Access Table Level SFST[7:5] 111b 4 (hard lock on both blocks) 011b/101b (hard lock on both blocks) 001b/110b (Block 0 = SoftLock, Block 1 = hard lock) 3 010b (SoftLock on both blocks) 100b 2 (SoftLock on both blocks) 000b 1 (unlock) 1. Location of MOVC or IAP instruction 2 ...
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... RAM data will not be altered. 10.3 Brown-out Detection Reset The device includes a brown-out detection circuit to protect the system from severed supplied voltage V SST89E516RDx internal brown-out detection threshold is 3.85V, SST89V516RDx brown-out detection threshold is through a 10 2.35V. For brown-out voltage parameters, please refer to DD Table 14-6 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 11.0 INTERRUPTS 11.1 Interrupt Priority and Polling Sequence The device supports eight interrupt sources under a four level priority scheme. Table 11-1 summarizes the polling sequence of the supported interrupts. Note that the SPI serial interface and the UART share the same interrupt vector ...
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... INDIVIDUAL ENABLES FIGURE 11-1: Interrupt Structure ©2007 Silicon Storage Technology, Inc. IP/IPH/IPA/IPAH IE & IEA REGISTERS REGISTERS IE0 IE1 IE2 IE3 GLOBAL DISABLE 60 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD HIGHEST PRIORITY INTERRUPT INTERRUPT POLLING SEQUENCE LOWEST PRIORITY INTERRUPT 1273 F28.0 S71273-03-000 1/07 ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 12.0 POWER-SAVING MODES The device provides two power saving modes of operation for applications where power consumption is critical. The two modes are idle and power-down, see Table 12-1. 12.1 Idle Mode Idle mode is entered setting the IDL bit in the PCON regis- ter ...
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... Device Clocks per Machine Cycle SST89E516RDx 12 SST89V516RDx 12 ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 13-1: Recommended Values for C1 and Crystal Quartz Ceramic More specific information about on-chip oscillator design can be found in the FlashFlex Oscillator Circuit Design Considerations application note. ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 14.0 ELECTRICAL SPECIFICATION Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Ambient Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...
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... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. 2. Refer to PCI spec. ©2007 Silicon Storage Technology, Inc. = 100 pF L T14-3.0 1273 =3.3V, T =25°C, f=1 Mhz, other pins open FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Minimum Units 100 µs 100 µs Test Condition Maximum ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 14.1 DC Electrical Characteristics TABLE 14-6: DC Electrical Characteristics for SST89E516RDx T = -40°C to +85° Symbol Parameter V Input Low Voltage IL V Input High Voltage IH V Input High Voltage (XTAL1, RST) IH1 V Output Low Voltage (Ports 1.5, 1.6, 1.7) ...
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... Pins of Ports 1, 2, and 3 source a transition current when they are being externally driven from The transition current reaches its maximum value when V is approximately 2V Pin capacitance is characterized but not tested. EA# is 25pF (max). ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD s of ALE and Ports 1 & 3. The noise OL on ALE and PSEN# to momentarily fall below the V OH ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 14-7: DC Electrical Characteristics for SST89V516RDx T = -40°C to +85° Symbol Parameter V Input Low Voltage IL V Input High Voltage IH V Input High Voltage (XTAL1, RST) IH1 V Output Low Voltage (Ports 1.5, 1.6, 1. Output Low Voltage (Ports ...
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... Pins of Ports 1, 2, and 3 source a transition current when they are being externally driven from The transition current reaches its maximum value when V is approximately 2V Pin capacitance is characterized but not tested. EA# is 25pF (max). ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD on ALE and PSEN# to momentarily fall below the FlashFlex MCU - 0 ...
Page 69
... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD FIGURE 14-1: I vs. Frequency for 3V SST89V516RDx FIGURE 14-2: I vs. Frequency for 5V SST89E516RDx DD ©2007 Silicon Storage Technology, Inc. Maximum Active I Typical Active Internal Clock Frequency (MHz) Maximum Active I Typical Active Internal Clock Frequency (MHz) 69 Data Sheet ...
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... ALE Low to Valid Data In LLDV T Address to Valid Data In AVDV T ALE Low to RD# or WR# Low LLWL T Address to RD# or WR# Low AVWL ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD = 2.7-3.6V@33MHz, 4.5-5.5V@40MHz Oscillator 33 MHz (x1 Mode) 40 MHz (x1 Mode MHz (x2 Mode) 20 MHz (x2 Mode) Min Max ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD TABLE 14-8: AC Electrical Characteristics (Continued -40°C to +85° Symbol Parameter T Data Hold After WR# WHQX T Data Valid to WR# High QVWH T Data Valid to WR# High to Low QVWX Transition T RD# Low to Address Float RLAZ T RD# to WR# High to ALE High WHLH 1 ...
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... FIGURE 14-3: External Program Memory Read Cycle T LHLL ALE PSEN# RD# T AVLL A0-A7 FROM RI or DPL PORT 0 PORT 2 FIGURE 14-4: External Data Memory Read Cycle ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD T PLPH T LLIV T LLPL T PLIV T PLAZ T PXIZ T LLAX T PXIX ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD T LHLL ALE PSEN# WR# T AVLL PORT 0 A0-A7 FROM RI or DPL PORT 2 FIGURE 14-5: External Data Memory Write Cycle TABLE 14-9: External Clock Drive Symbol Parameter 1/T Oscillator Frequency CLCL T CLCL T High Time CHCX T Low Time ...
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... QVXH XHDX T XHDV VALID VALID VALID VALID 1273 F37.0 Note HIGH Test LOW Test V IHT -V INPUT HIGH Test V ILT - V INPUT LOW Test 74 FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD Oscillator Variable Max Min Max 12T CLCL 10T - 133 CLCL 2T - 117 CLCL CLCL ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD V LOAD +0.1V Timing Reference V LOAD Points V LOAD -0.1V For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs, and begins to float when a 100 mV change from the loaded level occurs ± 20mA. ...
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... XTAL2 CLOCK XTAL1 SIGNAL V SS All other pins disconnected FIGURE 14-12: I Test Condition, DD Idle Mode ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 1273 F41.0 All other pins disconnected FIGURE 14-13: I TABLE 14-11: Flash Memory Programming/ Parameter Chip-Erase Time Block-Erase Time ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 15.0 PRODUCT ORDERING INFORMATION Device Speed Suffix1 SST89x516RDx ©2007 Silicon Storage Technology, Inc. Suffix2 Environmental Attribute non- non-Pb / non-Sn contact finish Package Modifier pins pins Package Type P = PDIP N = PLCC Q = WQFN TQ = TQFP Operation Temperature C = Commercial = 0°C to +70° Industrial = -40° ...
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... SST89E516RD2-40-I-NJE SST89E516RD2-40-I-TQJE Valid combinations for SST89V516RD2 SST89V516RD2-33-C-NJE SST89V516RD2-33-C-TQJE SST89V516RD2-33-I-NJE SST89V516RD2-33-I-TQJE Valid combinations for SST89E516RD SST89E516RD-40-C-PIE SST89E516RD-40-C-QIF SST89E516RD-40-I-QIF Valid combinations for SST89V516RD SST89V516RD-33-C-PIE SST89V516RD-33-C-QIF SST89V516RD-33-I-QIF Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...
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... FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 16.0 PACKAGING DIAGRAMS TOP VIEW Pin #1 6.00 ± 0.10 Note: 1. Complies with JEDEC JEP95 MO-220I, variant WJJD-5 except external paddle nominal dimensions. 2. From the bottom view, the pin #1 indicator may be either a 45-degree chamfer or a half-circle notch. ...
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... All linear dimensions are in inches (min/max). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .008 inches. 4. Coplanarity: 4 mils. FIGURE 16-3: 44-lead Plastic Lead Chip Carrier (PLCC) SST Package Code: NJ ©2007 Silicon Storage Technology, Inc. SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD SIDE VIEW .147 .020 R. .158 MAX ...
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... Status change from Preliminary Specifications to Data sheet 02 • Removed NJ, TQJ, and PI from Valid Combinations on page 78 • Removed valid combination SST89E516RD-40-I-PIE and SST89V516RD-33-I-PIE on page 78 03 • Replaced FlashFlex51 with FlashFlex globally Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036 © ...