ATMEGA64A-AUR Atmel, ATMEGA64A-AUR Datasheet - Page 211
![IC MCU AVR 64K FLASH 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64A-AUR
Manufacturer Part Number
ATMEGA64A-AUR
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA64A-MUR.pdf
(21 pages)
2.ATMEGA64A-AU.pdf
(392 pages)
3.ATMEGA64A-AU.pdf
(3 pages)
Specifications of ATMEGA64A-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (8Mb)
Note:
8160C–AVR–07/09
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7
Assembly code example
1. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced
ldi
out
wait1:
in
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait2:
in
sbrs r16,TWINT
rjmp wait2
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait3:
in
sbrs r16,TWINT
rjmp wait3
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and
“CBR”.
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, START
r16, SLA_W
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_SLA_ACK
r16, DATA
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_DATA_ACK
r16, (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
TWCR, r16
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made for example by using include-files.
(1)
• After all TWI Register updates and other pending application software tasks have been
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a
one to TWINT clears the flag. The TWI will then commence executing whatever operation
was specified by the TWCR setting.
C example
TWCR = (1<<TWINT)|(1<<TWSTA)|
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != START)
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_SLA_ACK)
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != MT_DATA_ACK)
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWEN)
(1<<TWSTO);
(1)
;
ERROR();
;
ERROR();
;
ERROR();
Comments
Send START condition
Wait for TWINT flag set. This
indicates that the START
condition has been transmitted
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR
Load SLA_W into TWDR
Register. Clear TWINT bit in
TWCR to start transmission of
address
Wait for TWINT flag set. This
indicates that the SLA+W has
been transmitted, and
ACK/NACK has been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_SLA_ACK go to ERROR
Load DATA into TWDR Register.
Clear TWINT bit in TWCR to
start transmission of data
Wait for TWINT flag set. This
indicates that the DATA has been
transmitted, and ACK/NACK has
been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_DATA_ACK go to ERROR
Transmit STOP condition
ATmega64A
211
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