73S8024C-ILR/F Maxim Integrated Products, 73S8024C-ILR/F Datasheet - Page 12

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73S8024C-ILR/F

Manufacturer Part Number
73S8024C-ILR/F
Description
IC SMART CARD INTERFACE 28-SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 73S8024C-ILR/F

Controller Type
Smart Card Interface
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Interface
-
73S8024C Data Sheet
11 I/O Circuitry and Timing
The I/O, AUX1, and AUX2 pins are in the low state after power on reset and they are in the high state
when the activation sequencer turns on the I/O reception state. See
more details on when the I/O reception is on.
The state of the I/OUC, AUX1UC, and AUX2UC is high after power on reset. Within a card session and
when the I/O reception state is on, the first I/O line on which a falling edge is detected becomes the input
I/O line and the other becomes the output I/O line. When the input I/O line rising edge is detected, both
I/O lines return to their neutral state.
Figure 7
The delay between the I/O signals is shown in
12
IOUC
Delay from I/O to I/OUC:
Delay from I/OUC to I/O:
IO
shows the state diagram of how the I/O and I/OUC lines are managed to become input or output.
t
IO_HL
t
t
IO_HL
I/OUC_HL
Figure 8: I/O – I/OUC Delays: Timing Diagram
= 100 ns
Figure 7: I/O and I/OUC State Diagram
= 100 ns
No
t
IO_LH
t
t
IO_LH
I/OUC_LH
Figure
reception
not I/OUC
Neutral
not I/O
State
I/OUC
I/OUC
I/OUC
= 25 ns
I/O
Yes
Yes
yes
I/O
No
in
&
&
= 25 ns
8.
No
No
I/OICC
Yes
yes
I/O
in
t
IOUC_HL
Section 8 Activation Sequence
No
t
IOUC_LH
DS_8024C_023
Rev. 1.3
for

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