CP2105-F01-GM Silicon Laboratories Inc, CP2105-F01-GM Datasheet

IC SGL USB-DL UART BRIDGE 24QFN

CP2105-F01-GM

Manufacturer Part Number
CP2105-F01-GM
Description
IC SGL USB-DL UART BRIDGE 24QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2105-F01-GM

Package / Case
24-WFQFN Exposed Pad
Applications
UART-to-USB Bridge
Interface
UART, USB
Voltage - Supply
1.8V, 3 V ~ 3.6 V
Mounting Type
Surface Mount
Input Voltage Range (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Supply Current (max)
18.5 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-2005 - KIT EVAL FOR CP2105
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-2009-5

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S
Single-Chip USB to Dual UART Data Transfer
USB Peripheral Function Controller
Two UART Interfaces (“Enhanced” and “Standard”)
Enhanced UART Interface Features
Rev. 1.0 10/10
External Supply
Connector
(1.8V to VDD)
VBUS
Connect to
Logic Level
INGLE
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
GND
VBUS or
USB
Supply
D+
D-
All modem interface signals available (when GPIO is not
required
storing customizable product information
- Hardware (CTS / RTS)
- Software (X-On / X-Off)
- No flow control
used)
- Data bits: 5, 6, 7, and 8
- Stop bits: 1, 1.5, and 2
- Parity: odd, even, mark, space, no parity
Integrated USB transceiver; no external resistors
Integrated clock; no external crystal required
Integrated 296-Byte One-Time Programmable ROM for
On-chip power-on reset circuit
On-chip voltage regulator: 3.45 V output
USB Specification 2.0 compliant; full-speed (12 Mbps)
USB Suspend states supported via SUSPEND pins
Flow control options:
Configurable I/O (1.8 V to V
Configurable I/O (V
Data formats supported:
Baud rates: 300 bps to 2.0 Mbps
320 Byte receive and transmit buffers
Two GPIO signals for status and control
RS-485 mode with bus transceiver control
- C
H IP
RST
VIO
REGIN
VDD
GND
VBUS
D+
D-
DD
Regulator
to 5 V) using external pull-up
Voltage
Transceiver
Full-Speed
USB
(Product Customization)
12 Mbps
DD
USB Interface
296 Byte PROM
I/O Power and Logic Levels
) using V
Figure 1. Example System Diagram
Copyright © 2010 by Silicon Laboratories
Peripheral
Controller
Oscillator
TO
Function
48 MHz
IO
pin
D
UAL
Data FIFOs
Baud Rate
Generator
320 B RX
288 B RX
320 B TX
288 B TX
CP2105
UART B
Standard UART Interface Features
Virtual COM Port Device Drivers
USBXpress™ Direct Driver Support
Supply Voltage
Package
Ordering Part Number
Temperature Range: –40 to +85 °C
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Data format: 8 data bits, 1 Stop bit
Parity: Even, Odd, No parity
Baud rates: 2400 bps to 921600 bps
288 Byte receive and transmit buffers
Three GPIO signals for status and control
Works with Existing COM Port PC Applications
Royalty-Free Distribution License
Windows 7/Vista/XP/Server 2003/2000
Mac OS-X
Linux
Royalty-Free Distribution License
Windows 7/Vista/XP/Server 2003/2000
Windows CE 6.0, 5.0, and 4.2
Self-powered: 3.0 to 3.6 V
USB bus powered: 4.0 to 5.25 V
I/O voltage: 1.8 V to V
RoHS-compliant 24-pin QFN (4 x 4 mm)
CP2105-F01-GM
Enhanced UART
GPIO
GPIO
Standard UART
ECI Clock
SCI Clock
Control
Control
/ Handshake
/ Handshake
(ECI)
(SCI)
RIDGE
6
6
DD
GPIO.0_SCI
GPIO.2_SCI
GPIO.1_ECI
GPIO.1_SCI
GPIO0_ECI
NC
C P 2 1 0 5
SUSPEND
SUSPEND
/ DCD_ECI / VPP
/ DCD_SCI
/ DTR_ECI
/ DSR_ECI
/ DTR_SCI
/ DSR_SCI
RXD_ECI
RXD_SCI
RTS_ECI
CTS_ECI
TXD_ECI
TXD_SCI
RTS_SCI
CTS_SCI
/ RI_ECI
/ RI_SCI
Enhanced
and GPIO
and GPIO
CP2105
Standard
Signals
Signals
UART
UART

Related parts for CP2105-F01-GM

CP2105-F01-GM Summary of contents

Page 1

... Self-powered: 3.0 to 3.6 V  USB bus powered: 4.0 to 5.25 V  I/O voltage: 1  Package RoHS-compliant 24-pin QFN ( mm)  Ordering Part Number CP2105-F01-GM  Temperature Range: –40 to +85 °C CP2105 48 MHz Baud Rate ECI Clock Oscillator Generator SCI Clock ...

Page 2

... CP2105 2 Rev. 1.0 ...

Page 3

... GPIO.0-1—Transmit and Receive Toggle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.2. GPIO.1_ECI—RS-485 Transceiver Bus Control . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 8.3. Hardware Flow Control (RTS and CTS One-Time Programmable ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10. Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11. CP2105 Device Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.1. Virtual COM Port Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.2. USBXpress Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 11.3. Driver Customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11.4. Driver Certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 12 ...

Page 4

... System Overview The CP2105 is a highly-integrated USB-to-Dual-UART Bridge Controller providing a simple solution for updating RS-232 designs to USB using a minimum of components and PCB space. The CP2105 includes a USB 2.0 full- speed function controller, USB transceiver, oscillator, one-time programmable ROM, and two asynchronous serial data buses (UART) with full modem control signals in a compact QFN-24 package (sometimes called “ ...

Page 5

... The USB Pull-up supply current values are calculated values based on USB specifications. Conditions V > 2 < 2 and GND IO Conditions ) Normal Operation; V Enabled REG Suspended; V Enabled REG Rev. 1.0 CP2105 Min Typ Max Units –55 — 125 °C –65 — 150 °C –0.3 — 5.8 V –0.3 — 3.6 – ...

Page 6

... V — — IO — — 0.6 15 — — Min Typ Max 3.0 — 5.25 3.3 3.45 3.6 2.5 — — — — 120 CP2105 . Min Typ Max Units — 1 — bit time* — 7.5 — — 7.5 — µA V Units V V µs ...

Page 7

... D In RTS_SCI 19* D Out *Note: Pins can be left unconnected when not used. Table 7. CP2105 Pin Definitions Description Power Supply Voltage Input. Voltage Regulator Output. See Section 10. Ground. Must be tied to ground. Device Reset. Open-drain output of internal POR or V source can initiate a system reset by driving this pin low for the time specified in Table 4 ...

Page 8

... CP2105 Table 7. CP2105 Pin Definitions (Continued) Name Pin # Type CTS_SCI 18 SUSPEND 17* D Out RI_ECI 16* — DCD_ECI Special PP GPIO.0_ECI 15* D I/O DTR_ECI D Out GPIO.1_ECI 14* D I/O DSR_ECI D in TXD_ECI 13 D Out RXD_ECI RTS_ECI 11* D Out CTS_ECI 10 *Note: Pins can be left unconnected when not used. ...

Page 9

... SUSPEND / RI_SCI 1 GND VIO 5 VDD 6 Figure 2. QFN-24 Pinout Diagram (Top View CP2105-GM 16 Top View 15 14 GND (optional) 13 Rev. 1.0 CP2105 CTS_SCI SUSPEND / RI_ECI NC / DCD_ECI / VPP GPIO.0_ECI / DTR_ECI GPIO.1_ECI / DSR_ECI TXD_ECI 9 ...

Page 10

... CP2105 4. QFN-24 Package Specifications Table 8. QFN-24 Package Dimensions Dimension Min A 0.70 A1 0.00 b 0.18 D 4.00 BSC. D2 2.55 e 0.50 BSC. E 4.00 BSC. E2 2.55 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to JEDEC Solid State Outline MO-220, variation WGGD except for custom features D2, E2 and L which are toleranced per supplier designation ...

Page 11

... A 2x2 array of 1.10 x 1.10 mm openings on a 1.30 mm pitch should be used for the center pad. Card Assembly 8. A No-Clean, Type-3 solder paste is recommended. 9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Dimension Min X2 2.70 Y1 0.65 Y2 2.70 Rev. 1.0 CP2105 Max 2.80 0.75 2.80 11 ...

Page 12

... USB Reset signal is detected device reset occurs. On exit of Suspend mode the SUSPEND signal is de- asserted. SUSPEND is weakly pulled to VIO in a high impedance state during a CP2105 reset. If this behavior is undesirable, a strong pulldown (10 k) can be used to ensure SUSPEND remains low during reset. ...

Page 13

... Communications Interface Only one mode can be selected for each interface. Also, the mode of the CP2105 can only be configured once and cannot be reset to the default configuration after being programmed. Refer to “AN223: Port Configuration and GPIO for CP210x” for more information on how to configure the port pins of the CP2105. ...

Page 14

... GPIO pins. To use the pins as GPIO pins, the interface with the GPIO pins must be configured in GPIO Mode. By default, both communication interfaces on the CP2105 are configured for GPIO Mode. If the Modem Control signals are needed, the interface must be configured for Modem Mode. See Section 7 for more information on Modem Mode ...

Page 15

... UART data transmission as well as line break transmission and the RX Toggle mode is not available. The RS-485 mode of GPIO.1_ECI is active-high by default, and is also configurable for active-low mode. CP2105 GPIO.1_ECI – RS485 Figure 6. RS-485 Transceiver Typical Connection Diagram Rev. 1.0 CP2105 RS-485 Transceiver 15 ...

Page 16

... RX FIFO reaches the watermark, the CP2105 pulls RTS high to indicate to the external UART device to stop sending data. CTS, or Clear To Send active-low input to the CP2105 and is used by the external UART device to indicate to the CP2105 when the external UART device’s RX FIFO is getting full. The CP2105 will not send more than two bytes of data once CTS is pulled high ...

Page 17

... One-Time Programmable ROM The CP2105 includes an internal one-time programmable ROM that may be used to customize the USB Vendor ID (VID), Product ID (PID), Product Description String, Power Descriptor, Device Release Number, Interface Strings, and Device Serial Number as desired for OEM applications. If the programmable ROM has not been programmed, the default configuration data shown in Table 13 and Table 14 is used ...

Page 18

... CP2105 10. Voltage Regulator The CP2105 includes an on-chip 5 to 3.45 V voltage regulator. This allows the CP2105 to be configured as either a USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus- powered application using the regulator is shown in Figure 8. When enabled, the voltage regulator output appears on the V pin and can be used to power external devices ...

Page 19

... Note configuration ROM programmed via USB, a 4.7 F capacitor must be added between NC / DCD_ECI / VPP and ground. During a programming operation, the pin should not be connected to other circuitry, and VDD must be at least 3.3 V. Figure 9. Typical Self-Powered Connection Diagram (Regulator Bypass) pin, the CP2105 can function as a USB self-powered DD CP2105 VIO ...

Page 20

... CP2105 11. CP2105 Device Drivers There are two sets of device drivers available for CP2105 devices: the Virtual COM Port (VCP) drivers and the USBXpress Direct Access drivers. Only one set of drivers is necessary to interface with the device. The latest drivers are available at http://www.silabs.com/products/mcu/Pages/SoftwareDownloads.aspx. ...

Page 21

... Relevant Application Notes The following Application Notes are applicable to the CP2105. The latest versions of these application notes and their accompanying software are available at http://www.silabs.com/products/mcu/Pages/ApplicationNotes.aspx.  AN144: CP21xx Device Customization Guide. This application note describes how to use the AN144 software CP21xxSetIDs to configure the USB parameters on the CP21xx devices. ...

Page 22

... CP2105 OCUMENT HANGE IST Revision 0.1 to Revision 0.5  Updated ordering part number on page 1.  Updated electrical specifications throughout Section 2.  Added information on VPP pin in Section 3.  Added Section 7.  Updated Section 8.  Updated Section 9. Revision 0.5 to Revision1.0  Removed preliminary language. ...

Page 23

... N : OTES Rev. 1.0 CP2105 23 ...

Page 24

... CP2105 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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