NMTC-S20400XRGHS Microtips Technology, NMTC-S20400XRGHS Datasheet - Page 17

LCD Character Display Modules Gray Reflective

NMTC-S20400XRGHS

Manufacturer Part Number
NMTC-S20400XRGHS
Description
LCD Character Display Modules Gray Reflective
Manufacturer
Microtips Technology
Datasheet

Specifications of NMTC-S20400XRGHS

Character Count X Line
20 x 4
Module Size (w X H X T)
98.5 mm x 60 mm x 10.5 mm
Fluid Type
STN
Background Color
Gray
Backlight Type
None
Display Mode
Reflective
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Function Set
DL : Interface data length control bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit
or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data by two times.
N : Display line number control bit
When N = "Low", it means 1-line display mode.
When N = "High", 2-line display mode is set.
F : Display font type control bit
When F = "Low", it means 5 X 8 dots format display mode
When F = "High", 5 x11 dots format display mode.
Set CG RAM Address
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
Set DD RAM Address
Set DDRAM address to AC.
This instruction makes DDRAM data available from MPU.
When 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH".
In 2-line display mode (N = 1), DDRAM address in the 1st line is from "00H" to "27H", and
DDRAM address in the 2nd line is from "40H" to "67H".
Read Busy Flag and Address
This instruction shows whether KS0066U is in internal operation or not. If the resultant BF is High,
it means the internal operation is in progress and you have to wait until BF to be Low, and then the
next instruction can be performed. In this instruction you can read also the value of address counter.
RS
RS
RS
RS
00
0
0
0
R/W
R/W
R/W
R/W
0
0
0
1
DB7
DB7
DB7
DB7
BF
0
0
1
DB6
DB6
DB6
AC6
DB6
AC6
0
1
AC5
DB5
DB5
DB5
AC5
DB5
AC5
1
DB4
DB4
AC4
DB4
AC4
DB4
AC4
DL
17
DB3
DB3
AC3
DB3
AC3
DB3
AC3
N
DB2
DB2
AC2
DB2
AC2
DB2
AC2
F
DB1
DB1
AC1
DB1
AC1
DB1
AC1
*
DB0
DB0
AC0
DB0
AC0
DB0
AC0
*

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