SAM7-P256 Olimex Ltd., SAM7-P256 Datasheet - Page 4

• Manufacturer Part Number: SAM7-P256
• Description: MCU, MPU & DSP Development Tools DEV BRD FOR AT91SAM7S56
• Manufacturer: Olimex Ltd.

Specifications of SAM7-P256

• Processor To Be Evaluated: AT91SAM7S256 ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Interface Type: RS-232, USB, JTAG, SPI, TWI, UART
• Dimensions: 120 mm x 80 mm
• Operating Supply Voltage: 6 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: ARM7TDMI
• Silicon Core Number: AT91S
• Silicon Family Name: AT91SAM7xxxx
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1701511 25R5021

Memory Controller (MC)
Reset Controller (RSTC)
Clock Generator (CKGR)
Power Management Controller (PMC)
Advanced Interrupt Controller (AIC)
Debug Unit (DBGU)
Periodic Interval Timer (PIT)
Windowed Watchdog (WDT)
Real-time Timer (RTT)
One Parallel Input/Output Controller (PIOA)
Based on Power-on Reset and Low-power Factory-calibrated Brown-out
Detector
Provides External Reset Signal Shaping and Reset Source Status
64 Kbytes
Embedded Flash Controller, Abort Status and Misalignment Detection
Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one
PLL
Software Power Optimization Capabilities, Including Slow Clock
Mode (Down to 500 Hz) and Idle Mode
Three Programmable External Clock Signals
Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
Two External Interrupt Source(s) and One Fast Interrupt Source,
Spurious Interrupt Protected
2-wire UART and Support for Debug Communication Channel
interrupt, Programmable ICE Access Prevention
Mode for General Purpose 2-wire UART Serial Communication
20-bit Programmable Counter plus 12-bit Interval Counter
12-bit key-protected Programmable Counter
Provides Reset or Interrupt Signals to the System
Counter May Be Stopped While the Processor is in Debug State or in
Idle Mode
32-bit Free-running Counter with Alarm
Runs Off the Internal RC Oscillator
Thirty-two Programmable I/O Lines Multiplexed with up to Two
Peripheral I/Os
Input Change Interrupt Capability on Each I/O Line
Individually Programmable Open-drain, Pull-up resistor and
Synchronous Output
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