WM8731LSEFL/R Wolfson Microelectronics, WM8731LSEFL/R Datasheet - Page 5

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WM8731LSEFL/R

Manufacturer Part Number
WM8731LSEFL/R
Description
Audio CODECs STEREO CODEC w/ HP 28-pin
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8731LSEFL/R

Number Of Adc Inputs
1
Number Of Dac Outputs
1
Conversion Rate
96 KSPS
Interface Type
Serial (2-Wire, 3-Wire, I2S)
Resolution
18 bit, 20 bit
Operating Supply Voltage
- 0.3 V to + 3.63 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN EP
Minimum Operating Temperature
- 40 C
Number Of Channels
2 ADC/2 DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WM8731LSEFL/R
Manufacturer:
WOLFSON
Quantity:
20 000
Company:
Part Number:
WM8731LSEFL/R
Quantity:
8 500
WM8731 / WM8731L
PIN DESCRIPTION
Note:
1.
2.
w
28 PIN
SSOP
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pull Up/Down only present when Control Register Interface ACTIVE=0 to conserve power.
It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB.
1
2
3
4
5
6
7
8
9
28 PIN
QFN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
5
6
7
8
9
1
2
3
4
XTI/MCLK
DACDAT
DACLRC
ADCLRC
RHPOUT
MICBIAS
CLKOUT
ADCDAT
LHPOUT
RLINEIN
LLINEIN
HPGND
DBVDD
HPVDD
DCVDD
AGND
MODE
DGND
NAME
ROUT
AVDD
MICIN
BCLK
LOUT
SCLK
VMID
SDIN
CSB
XTO
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Digital Output
Digital Output
Digital Output
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Ground
Ground
Ground
Supply
Supply
Supply
Supply
TYPE
Digital Buffers VDD
Buffered Clock Output
Digital Audio Bit Clock, Pull Down, (see Note 1)
DAC Digital Audio Data Input
DAC Sample Rate Left/Right Clock, Pull Down (see Note 1)
ADC Digital Audio Data Output
ADC Sample Rate Left/Right Clock, Pull Down (see Note 1)
Headphone VDD
Left Channel Headphone Output
Right Channel Headphone Output
Headphone GND
Left Channel Line Output
Right Channel Line Output
Analogue VDD
Analogue GND
Mid-rail reference decoupling point
Electret Microphone Bias
Microphone Input (AC coupled)
Right Channel Line Input (AC coupled)
Left Channel Line Input (AC coupled)
Control Interface Selection, Pull Up (see Note 1)
3-Wire MPU Chip Select/ 2-Wire MPU interface address
selection, active low, Pull up (see Note 1)
3-Wire MPU Data Input / 2-Wire MPU Data Input
3-Wire MPU Clock Input / 2-Wire MPU Clock Input
Crystal Input or Master Clock Input (MCLK)
Crystal Output
Digital Core VDD
Digital GND
DESCRIPTION
PD, Rev 4.8, April 2009
Production Data
5

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